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AM3874 Datasheet(PDF) 274 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 274 Page - Texas Instruments |
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274 / 361 page  AM3874, AM3871 SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 www.ti.com 8.13 DDR2/DDR3 Memory Controller The device has a dedicated interface to DDR3 and DDR2 SDRAM. The device dedicated interface also supports JEDEC standard compliant DDR2 and DDR3 SDRAM devices with the following features: • 16-bit or 32-bit data path to external SDRAM memory • Memory device capacity: 64Mb, 128Mb, 256Mb, 512Mb, 1Gb, 2Gb, and 4Gb devices • Support for two independent chip selects, with their corresponding register sets, and independent page tracking • Two interfaces with associated DDR2/DDR3 PHYs • Dynamic memory manager allows for interleaving of data between the two DDR interfaces. For details on the DDR2/DDR3 Memory Controller, see the DDR2/DDR3 Memory Controller chapter of the AM387x Sitara™ ARM Processors Technical Reference Manual (Literature Number: SPRUGZ7). 274 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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