PEB2256HT datasheet(369/490 Pages) INFINEON

369 / 490 page

FALC56 V1.2

PEB 2256

T1/J1 Registers

Data Sheet

369

2002-08-27

Line Interface Mode 2 (Read/Write)

Value after reset: 20H

LBO(2:1)

Line Build-Out

In long-haul applications LIM0.EQON = 1 a transmit filter can be

optionally placed on the transmit path to attenuate the data on pins

XL1/2. Selecting the transmitter attenuation is possible in steps of

7.5 dB at 772kHz which is according to FCC68 and ANSI T1.403.

To meet the line build-out defined by ANSI T1.403 registers XPM(2:0)

should be programmed as follows:

00 =

0 dB

01 =

7.5 dB

→XPM(2:0) = 20

H, 02H, 51H

10 =

-15 dB

→XPM(2:0) = 20

H, 01H, 51H

11 =

-22.5 dB

→XPM(2:0) = 20

H, 01H, 50H

SLT(1:0)

Receive Slicer Threshold

00 = The receive slicer generates a mark (digital one) if the voltage

at RL1/2 exceeds 55% of the peak amplitude.

01 = The receive slicer generates a mark (digital one) if the voltage

at RL1/2 exceeds 67% of the peak amplitude (may be used in

some T1/J1 applications).

10 = The receive slicer generates a mark (digital one) if the voltage

at RL1/2 exceeds 50% of the peak amplitude (default,

recommended in T1/J1 mode).

11 = The receive slicer generates a mark (digital one) if the voltage

at RL1/2 exceeds 45% of the peak amplitude.

SCF

Select Corner Frequency of DCO-R

Setting this bit reduces the corner frequency of the DCO-R circuit by

the factor of ten to 0.6 Hz.

Note: Reducing the corner frequency of the DCO-R circuitry

increases the synchronization time before the frequencies are

synchronized.

LIM2

LBO2

LBO1

SLT1

SLT0

SCF

ELT

LOS1

(3A)

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