PEB2256HT datasheet(371/490 Pages) INFINEON

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FALC56 V1.2

PEB 2256

T1/J1 Registers

Data Sheet

371

2002-08-27

LDC(1:0)

Length Deactivate (Down) Code

These bits defines the length of the LLB deactivate code which is

programmable in register LCR2.

00 = Length: 5 bit

01 = Length: 6 bit, 2 bit, 3 bit

10 = Length: 7 bit

11 = Length: 8 bit, 2 bit, 4bit

LAC(1:0)

Length Activate (Up) Code

These bits defines the length of the LLB activate code which is

programmable in register LCR3.

00 = Length: 5 bit

01 = Length: 6 bit, 2 bit, 3 bit

10 = Length: 7 bit

11 = Length: 8 bit, 2 bit, 4bit

FLLB

Framed Line Loop-Back/Invert PRBS

Depending on bit LCR1.XPRBS this bit enables different functions:

LCR1.XPRBS = 0:

0 =

The line loop-back code is transmitted including framing bits.

LLB code overwrites the FS/DL-bits.

1 =

The line loop-back code is transmitted unframed. LLB code

does not overwrite the FS/DL-bits.

Invert PRBS

LCR1.XPRBS = 1:

0 =

The generated PRBS is transmitted not inverted.

1 =

The PRBS is transmitted inverted.

LLBP

Line Loop-Back Pattern

LCR1.XPRBS = 0

0 =

Fixed line loop-back code according to ANSI T1. 403.

1 =

Enable user-programmable line loop-back code by register

LCR2/3.

LCR1.XPRBS = 1 or LCR1.EPRM = 1

15 -1

20 -1

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