PEB2256HT datasheet(375/490 Pages) INFINEON

375 / 490 page

FALC56 V1.2

PEB 2256

T1/J1 Registers

Data Sheet

375

2002-08-27

SSF

Serial Signaling Format

Only applicable if pin function RSIG/XSIG and SIC3.TTRF = 0 is

selected.

0 =

Bits 1 to 4 in all time slots except time slot 0 are cleared.

1 =

Bits 1 to 4 in all time slots except time slot 0 are set high.

CRB

Center Receive Elastic Buffer

Only

applicable

the

time

slot

assigner

disabled

(PC(4:1).RPC(2:0) = 001

B), no external or internal synchronous pulse

receive is generated.

A transition from low to high forces a receive slip and the read pointer

of the receive elastic buffer is centered. The delay through the buffer

is set to one half of the current buffer size. It should be hold high for

at least two 1.544 MHz periods before it is cleared.

SSC2

Select System Clock

This bit together with SIC1.SSC1/0 enables the system interface to

run with a clock of 1.544, 3.088, 6.176 or 12.352 MHz (SSC2 = 1) or

2.048, 4.096, 8.192 or 16.384 MHz (SSC2 = 0).

See also register SIC1.SSC1/0 on page 373.

SICS(2:0)

System Interface Channel Select

Only

applicable

the

system

clock

rate

greater

than

1.544

⁄2.048MHz.

Received data is transmitted on pin RDO/RSIG or received on

XDI

⁄XSIG with the selected system data rate. If the data rate is greater

than 1.544/2.048 Mbit/s the data is output or sampled in half, a

quarter or one eighth of the time slot. Data is not repeated. The time

while data is active during a 8

× 488/648 ns time slot is called a

channel phase. RDO/RSIG are cleared (driven to low level) while

XDI

⁄XSIG are ignored for the remaining time of the 8 × 488/648 ns or

for the remaining channel phases. The channel phases are selectable

with these bits.

000 =

Data active in channel phase 1, valid if system data rate is

16/8/4 or 12/6/3 Mbit/s

001 =

Data active in channel phase 2, valid if data rate is 16/8/4 or

12/6/3 Mbit/s

010 =

Data active in channel phase 3, valid if data rate is 16/8 or

12/6 Mbit/s

011 =

Data active in channel phase 4, valid if data rate is 16/8 or

12/6 Mbit/s

PEB2256HT Datasheet(PDF) 375 Page - Infineon Technologies AG

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