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PEB2256HT Datasheet(PDF) 376 Page - Infineon Technologies AG

Part # PEB2256HT
Description  E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
PDF  490 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

PEB2256HT Datasheet(HTML) 376 Page - Infineon Technologies AG

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FALC56 V1.2
PEB 2256
T1/J1 Registers
Data Sheet
376
2002-08-27
100 =
Data active in channel phase 5, valid if data rate is 16 or
12 Mbit/s
101 =
Data active in channel phase 6, valid if data rate is 16 or
12 Mbit/s
110 =
Data active in channel phase 7, valid if data rate is 16 or
12 Mbit/s
111 =
Data active in channel phase 8, valid if data rate is 16 or
12 Mbit/s
System Interface Control 3(Read/Write)
Value after reset: 00H
CMI
Select CMI Precoding
Only valid if CMI code (FMR0.XC(1:0) = 01) is selected. This bit
defines
the CMI precoding and influences transmit and receive data.
0 =
CMI with B8ZS precoding
1 =
CMI without B8ZS precoding
Note:Before local loop is closed, B8ZS precoding has to be switched
off.
RESX
Rising Edge Synchronous Pulse Transmit
Depending on this bit all transmit system interface data and marker
are clocked or sampled with the selected active edge.
CMR2.IXSC = 0:
0
latched with the first falling edge of the selected PCM highway
clock.
1
latched with the first rising edge of the selected PCM highway
clock.
CMR2.IXSC = 1:
value of RESX bit has no impact on the selected edge of the PCM
highway clock but value of RESR bit is used as RESX.
Example: If RESR = 0, the rising edge of PCM highway clock is the
selected one for sampling data on XDI and vice versa.
70
SIC3
CMI
RESX
RESR
TTRF
DAF
(40)



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