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PEB2256HT Datasheet(PDF) 142 Page - Infineon Technologies AG

Part # PEB2256HT
Description  E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
PDF  490 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

PEB2256HT Datasheet(HTML) 142 Page - Infineon Technologies AG

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FALC56 V1.2
PEB 2256
Functional Description T1/J1
Data Sheet
142
2002-08-27
Figure 49 gives an overview of influences on synchronization status for the case of
different external actions. Activation of auto mode and non-auto mode is performed by
bit FMR4.AUTO. Generally, for initiating resynchronization it is recommended to use bit:
FMR0.EXLS first. In cases where the synchronizer remains in the asynchronous state,
bit FMR0.FRS is used to enforce it to lock onto the next framing candidate, although it
might be a simulated one.
5.2.4
4-Frame Multiframe (F4 Format, T1/J1)
The allocation of the FT-bits (bit 1 of frames 1 and 3) for frame alignment signal is shown
in Table 33.
The FS-bit can be used for signaling. Remote alarm (yellow alarm) is indicated by setting
bit 2 to 0 in each time slot.
5.2.4.1
Synchronization Procedure
For multiframe synchronization, the terminal framing bits (FT-bits) are observed. The
synchronous state is reached if at least one terminal framing candidate is definitely
found, or the synchronizer is forced to lock onto the next available candidate
(FMR0.FRS).
Table 33
4-Frame Multiframe Structure (T1/J1)
Frame Number
F
T
F
S
1
2
3
4
1
–
0
–
service bit
service bit



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