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PEB2256HT Datasheet(PDF) 143 Page - Infineon Technologies AG |
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PEB2256HT Datasheet(HTML) 143 Page - Infineon Technologies AG |
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143 / 490 page ![]() FALC56 V1.2 PEB 2256 Functional Description T1/J1 Data Sheet 143 2002-08-27 5.2.5 12-Frame Multiframe (D4 or SF Format, T1/J1) Normally, this kind of multiframe structure only makes sense when using the CAS robbed-bit signaling. The multiframe alignment signal is located at the FS-bit position of every other frame (refer to Table 34). There are two possibilities of remote alarm (yellow alarm) indication: • Bit 2 = 0 in each time slot of a frame, selected with bit FMR0.SRAF = 0 • The last bit of the multiframe alignment signal (bit 1 of frame 12) changes from "0" to "1", selected with bit FMR0.SRAF = 1. 5.2.5.1 Synchronization Procedure In the synchronous state terminal framing (FT-bits) and multiframing (FS-bits) are observed, independently. Further reaction on framing errors depends on the selected synchronization/resynchronization procedure (by bit FMR2.SSP): • FMR2.SSP = 0: terminal frame and multiframe synchronization are combined. Two errors within 4/5/6 framing bits (by bits FMR4.SSC1/0) of one of the above leads to the asynchronous state for terminal framing and multiframing. Additionally to the bit FRS0.LFA, loss of multiframe alignment is reported by bit FRS0.LMFA. The resynchronization procedure starts with synchronizing upon the terminal framing. If the pulse framing has been regained, the search for multiframe alignment is initiated. Multiframe synchronization has been regained after two consecutive correct multiframe patterns have been received. • FMR2.SSP = 1: terminal frame and multiframe synchronization are separated Two errors within 4/5/6 terminal framing bits lead to the same reaction as described Table 34 12-Frame Multiframe Structure (T1/J1) Frame Number F T F S Signaling Channel Designation 1 2 3 4 5 6 7 8 9 10 11 12 1 – 0 – 1 – 0 – 1 – 0 – – 0 – 0 – 1 – 1 – 1 – 0 A B |
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