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MSP430F5259IRGCT Datasheet(PDF) 3 Page - Texas Instruments

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Part # MSP430F5259IRGCT
Description  Mixed-Signal Microcontrollers
PDF  112 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

MSP430F5259IRGCT Datasheet(HTML) 3 Page - Texas Instruments

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Unified
Clock
System
128KB
Flash
32KB
16KB
RAM
MCLK
ACLK
SMCLK
CPUXV2
and
Working
Registers
EEM
(S: 3+1)
XIN XOUT
JTAG,
SBW
Interface
DMA
3 Channel
XT2IN
XT2OUT
Power
Management
LDO
SVM, SVS
Brownout
SYS
Watchdog
Port Map
Control
(P4)
MPY32
TA0
Timer_A
5 CC
Registers
TA1
Timer_A
3 CC
Registers
TB0
Timer_B
7 CC
Registers
RTC_A
CRC16
ADC10_A
200 KSPS
12 Channels
(10 ext,2 int)
10 Bit
DVCC
DVSS
RST/NMI
TA2
Timer_A
3 CC
Registers
REF
VCORE
MAB
MDB
COMP_B
8 Channels
DVIO
AVCC
AVSS
BSLEN
I
C
4x
USCI_Ax:
UART,
IrDA, SP
4x
USCI_Bx:
SPI, I
2
PA
PB
PC
P1.x
P2.x
P3.x
P4.x
P5.x
P6.x
PD
P7.x
PJ
PJ.x
P4
1×8 I/Os
P5
1×6 I/Os
P6
1
(1)
×8 I/Os
P7
1×6 I/Os
PJ
1×4 I/Os
P1
1
(1)(2)
× I/Os
8
P2
1
(1)(2)
×8 I/Os
PA
1
(1)(2)
×16 I/Os
PB
1×13 I/Os
PC
1×14 I/Os
PD
1×6 I/Os
I/O Ports
I/O are supplied by DVIO
RSTDVCC
(1) Interrupt capability
P3
1×5 I/Os
(2) Wakeup capability
MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256
MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252
www.ti.com
SLAS903B – MAY 2013 – REVISED NOVEMBER 2015
1.4
Functional Block Diagram
Figure 1-1 shows the functional block diagram.
Figure 1-1. Functional Block Diagram
Copyright © 2013–2015, Texas Instruments Incorporated
Device Overview
3
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Product Folder Links: MSP430F5259 MSP430F5258 MSP430F5257 MSP430F5256 MSP430F5255 MSP430F5254
MSP430F5253 MSP430F5252



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