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MSP430F5259IRGCT Datasheet(PDF) 63 Page - Texas Instruments |
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MSP430F5259IRGCT Datasheet(HTML) 63 Page - Texas Instruments |
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63 / 112 page ![]() MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256 MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252 www.ti.com SLAS903B – MAY 2013 – REVISED NOVEMBER 2015 6.9.14 TB0 (Link to user's guide) TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compare registers. TB0 supports multiple captures or compares, PWM outputs, and interval timing. TB0 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers. Table 6-15. TB0 Signal Connections INPUT PIN NUMBER OUTPUT PIN NUMBER DEVICE INPUT MODULE INPUT MODULE DEVICE OUTPUT MODULE BLOCK SIGNAL SIGNAL OUTPUT SIGNAL SIGNAL RGC, ZQE RGC, ZQE (1) TB0CLK TBCLK ACLK (internal) ACLK Timer NA NA SMCLK (internal) SMCLK (1) TB0CLK TBCLK (1) TB0.0 CCI0A (1) ADC10 (internal) (1) TB0.0 CCI0B ADC10SHSx = {2} CCR0 TB0 TB0.0 DVSS GND DVCC VCC (1) TB0.1 CCI1A (1) ADC10 (internal) CBOUT (internal) CCI1B ADC10SHSx = {3} CCR1 TB1 TB0.1 DVSS GND DVCC VCC (1) TB0.2 CCI2A (1) (1) TB0.2 CCI2B CCR2 TB2 TB0.2 DVSS GND DVCC VCC (1) TB0.3 CCI3A (1) (1) TB0.3 CCI3B CCR3 TB3 TB0.3 DVSS GND DVCC VCC (1) TB0.4 CCI4A (1) (1) TB0.4 CCI4B CCR4 TB4 TB0.4 DVSS GND DVCC VCC (1) TB0.5 CCI5A (1) (1) TB0.5 CCI5B CCR5 TB5 TB0.5 DVSS GND DVCC VCC (1) TB0.6 CCI6A (1) ACLK (internal) CCI6B CCR6 TB6 TB0.6 DVSS GND DVCC VCC (1) Timer functions can be selected by the port mapping controller. Copyright © 2013–2015, Texas Instruments Incorporated Detailed Description 63 Submit Documentation Feedback Product Folder Links: MSP430F5259 MSP430F5258 MSP430F5257 MSP430F5256 MSP430F5255 MSP430F5254 MSP430F5253 MSP430F5252 |
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