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MSP430F5259IRGCT Datasheet(PDF) 33 Page - Texas Instruments |
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MSP430F5259IRGCT Datasheet(HTML) 33 Page - Texas Instruments |
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33 / 112 page ![]() MSP430F5259, MSP430F5258, MSP430F5257, MSP430F5256 MSP430F5255, MSP430F5254, MSP430F5253, MSP430F5252 www.ti.com SLAS903B – MAY 2013 – REVISED NOVEMBER 2015 5.31 PMM, SVM Low Side over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SVMLE = 0, PMMCOREV = 2 0 nA I(SVML) SVML current consumption SVMLE= 1, PMMCOREV = 2, SVMLFP = 0 200 SVMLE= 1, PMMCOREV = 2, SVMLFP = 1 1.5 µA SVMLE = 1, dVCORE/dt = 10 mV/µs, 2.5 SVMLFP = 1 tpd(SVML) SVML propagation delay µs SVMLE = 1, dVCORE/dt = 1 mV/µs, 20 SVMLFP = 0 SVMLE = 0 → 1, dVCORE/dt = 10 mV/µs, 12.5 SVMLFP = 1 t(SVML) SVML on or off delay time µs SVMLE = 0 → 1, dVCORE/dt = 1 mV/µs, 100 SVMLFP = 0 5.32 Wake-Up Times From Low-Power Modes and Reset over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fMCLK ≥ 4.0 MHz 3.5 7.5 Wake-up time from LPM2, PMMCOREV = SVSMLRRL = n tWAKE-UP-FAST LPM3, or LPM4 to active (where n = 0, 1, 2, or 3), µs 1.0 MHz < fMCLK < 4.5 9 mode(1) SVSLFP = 1 4.0 MHz Wake-up time from LPM2, PMMCOREV = SVSMLRRL = n tWAKE-UP-SLOW LPM3 or LPM4 to active (where n = 0, 1, 2, or 3), 150 175 µs mode(2) SVSLFP = 0 Wake-up time from LPM4.5 tWAKE-UP-LPM5 2 3 ms to active mode(3) Wake-up time from RST or tWAKE-UP-RESET 2 3 ms BOR event to active mode(3) (1) This value represents the time from the wake-up event to the first active edge of MCLK. The wake-up time depends on the performance mode of the low-side supervisor (SVSL) and low-side monitor (SVML). Fastest wake-up times are possible with SVSLand SVML in full- performance mode or disabled when operating in AM, LPM0, and LPM1. Various options are available for SVSLand SVML while operating in LPM2, LPM3, and LPM4. See the Power Management Module and Supply Voltage Supervisor chapter in the MSP430x5xx and MSP430x6xx Family User's Guide (SLAU208). (2) This value represents the time from the wake-up event to the first active edge of MCLK. The wake-up time depends on the performance mode of the low-side supervisor (SVSL) and low-side monitor (SVML). In this case, the SVSLand SVML are in normal mode (low current) mode when operating in AM, LPM0, and LPM1. Various options are available for SVSLand SVML while operating in LPM2, LPM3, and LPM4. See the Power Management Module and Supply Voltage Supervisor chapter in the MSP430x5xx and MSP430x6xx Family User's Guide (SLAU208). (3) This value represents the time from the wake-up event to the reset vector execution. Copyright © 2013–2015, Texas Instruments Incorporated Specifications 33 Submit Documentation Feedback Product Folder Links: MSP430F5259 MSP430F5258 MSP430F5257 MSP430F5256 MSP430F5255 MSP430F5254 MSP430F5253 MSP430F5252 |
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