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TMS320C6711 Datasheet(PDF) 101 Page - Texas Instruments |
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TMS320C6711 Datasheet(HTML) 101 Page - Texas Instruments |
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101 / 129 page  TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D FLOATING-POINT DIGITAL SIGNAL PROCESSORS SPRS088L − FEBRUARY 1999 − REVISED MAY 2004 101 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 HOST-PORT INTERFACE TIMING (CONTINUED) 1st halfword 2nd halfword 5 17 8 6 5 17 8 5 15 9 16 15 9 7 4 3 2 1 2 1 2 1 2 1 2 1 2 1 HAS HCNTL[1:0] HR/W HHWIL HSTROBE† HCS HD[15:0] (output) HRDY (case 1) HRDY (case 2) 3 † HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS. Figure 46. HPI Read Timing (HAS Not Used, Tied High) HAS† HCNTL[1:0] HR/W HHWIL HSTROBE‡ HCS HD[15:0] (output) HRDY (case 1) HRDY (case 2) 1st half-word 2nd half-word 5 17 8 5 17 8 5 15 9 16 15 9 7 4 3 11 10 11 10 11 10 11 10 11 10 11 10 19 19 18 18 † For correct operation, strobe the HAS signal only once per HSTROBE active cycle. ‡ HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS. Figure 47. HPI Read Timing (HAS Used) |
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