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TMS320DM642 Datasheet(PDF) 157 Page - Texas Instruments |
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TMS320DM642 Datasheet(HTML) 157 Page - Texas Instruments |
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157 / 178 page ![]() www.ti.com 5.16.3 EMAC Electrical Data/Timing MRCLK 2 3 1 MTCLK 2 3 1 TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor SPRS200J – JULY 2002 – REVISED AUGUST 2005 Table 5-73. EWRAP Registers HEX ADDRESS RANGE ACRONYM REGISTER NAME 01C8 3000 EWTRCTRL TR control 01C8 3004 EWCTL Interrupt control register 01C8 3008 EWINTTCNT Interrupt timer count 01C8 300C – 01C8 37FF – Reserved Table 5-74. Timing Requirements for MRCLK (see Figure 5-63) –500 –600 NO. UNIT –720 MIN MAX 1 tc(MRCLK) Cycle time, MRCLK 40 ns 2 tw(MRCLKH) Pulse duration, MRCLK high 14 ns 3 tw(MRCLKL) Pulse duration, MRCLK low 14 ns Figure 5-63. MRCLK Timing (EMAC – Receive) Table 5-75. Timing Requirements for MTCLK (see Figure 5-63) –500 –600 NO. UNIT –720 MIN MAX 1 tc(MTCLK) Cycle time, MTCLK 40 ns 2 tw(MTCLKH) Pulse duration, MTCLK high 14 ns 3 tw(MTCLKL) Pulse duration, MTCLK low 14 ns Figure 5-64. MTCLK Timing (EMAC – Transmit) DM642 Peripheral Information and Electrical Specifications 157 |
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