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SLG46721 Datasheet(PDF) 48 Page - Dialog Semiconductor |
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SLG46721 Datasheet(HTML) 48 Page - Dialog Semiconductor |
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48 / 101 page ![]() 000-0046721-114 Page 47 of 100 SLG46721 10.3.1 3-Bit LUT or Pipe Delay Macrocells Used as 3-Bit LUTs Each Macrocell, when programmed for a LUT function, uses a 8-bit register to define their output function: 3-Bit LUT8 is defined by reg<670:663> 10.3.2 3-Bit LUT or Pipe Delay Macrocells Used as Pipe Delay Register Settings Table 50. Pipe Delay Register Settings Signal Function Register Bit Address Register Definition LUT3_8 or Pipe Delay Output Select reg<963> 0: LUT3_8 1: 1 Pipe Delay Output OUT0 select reg<666:663> OUT1 select reg<670:667> Pipe delay OUT1 Polarity Select Bit reg<964> 0: Non-inverted 1: Inverted Table 49. 3-bit LUT8 Truth Table. IN2 IN1 IN0 OUT 0 0 0 reg <663> 0 0 1 reg <664> 0 1 0 reg <665> 0 1 1 reg <666> 1 0 0 reg <667> 1 0 1 reg <668> 1 1 0 reg <669> 1 1 1 reg <670> |
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