SLG46721 datasheet(53/101 Pages) DIALOG

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SLG46721

11.0 Analog Comparators (ACMP)

There are four Analog Comparator (ACMP) macrocells in the SLG46721. In order for the ACMP cells to be used in a GreenPAK

design, the power up signals (ACMP0_pdb, ACMP1_pdb, ACMP2_pdb and ACMP3_pdb) need to be active. By connecting to

signals coming from the Connection Matrix, it is possible to have each ACMP be on continuously, off continuously, or switched

on periodically based on a digital signal coming from the Connection Matrix. When ACMP is powered down, output is low.

Each of the ACMP cells has a positive input signal that can be provided by a variety of external sources, and can also have a

selectable gain stage before connection to the analog comparator. Each of the ACMP cells has a negative input signal that is

either created from an internal VREF or provided by way of the external sources.

PWR UP = 1 => ACMP is powered up.

PWR UP = 0 => ACMP is powered down.

During powerup, the ACMP output will remain low, and then become valid 120

s (max) after POR signal goes high. If Low

Bandwidth option enabled, then the ACMP output initializes in the high state.

Vref accuracy is optimized near 1000 mV selection.

Input bias current < 1 nA (typ). The Gain divider is unbuffered and consists of 1 M

 resistors. IN- voltage range: 0 - 1.2 V. Can

use Vref selection VDD/4 and VDD/3 to maintain this input range.

For high input impedance when using the gain divider (x0.25, x0.33, x0.5), it is possible to use the input buffer. However, this will

affect input voltage range, see Figure 18. It also will add the offset in a range of -24.5 mV to 12.6 mV. It is not recommended to

use the input buffer when the gain divider is not used. .

Note: the input buffer gain depends on VDD, see Figure 19.

Figure 18. Maximum Analog Buffer Input Voltage vs. VDD

0.5

1.5

2.5

3.5

4.5

1.7

1.8

1.9

2.5

2.7

3.0

3.3

3.6

4.2

4.5

5.0

5.5

VDD (V)

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