SLG46721 datasheet(64/101 Pages) DIALOG

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SLG46721

13.0 Counters/Delay Generators (CNT/DLY)

There are five configurable counters/delay generators in the SLG46721. Two of these counters/delay generators (CNT/DLY 0

and 1) are 14-bit, and three of the counters/delay generators (CNT/DLY 4, 5, 6) are 8-bit. For flexibility, each of these macrocells

has a large selection of internal and external clock sources, as well as the option to chain from the output of the previous (N-1)

CNT/DLY macrocell, to implement longer count / delay circuits.

One of the counter/delay generator macrocells (CNT/DLY 1) has two inputs from the connection matrix, one for Delay Input/Reset

Input (Delay_In/Reset_In), and one for an external counter/clock source. Four of the counter/delay generator macrocells

(CNT/DLY 0, 4, 5, 6) have one input from the connection matrix, which has a shared function of either a Delay Input or an external

clock input.

CNT/DLY6 has one extra output on which a short pulse will be generated according to the configured edge on the input signal if

detected.

Note that there are also two Combination Function Macrocells that can implement either 4-bit LUTs or 8-bit counter / delays, For

more information please see Section 10.4 4-Bit LUT or 8- Bit Counter / Delay Macrocells.

Figure 25. CNT/DLY0

CNT/DLY0

Counter_end

clk

To Connection

Matrix Input <13>

From Connection

Matrix Output <15>

Count_end_out_x-1

reg <713>

ext. clock

RC Osc/64

RC Osc/24

RC Osc/12

RC Osc/4

RC Osc

Counter Control Data

reg <730:717>

reg <716:714>

Delay_out

Delay_IN/CNT_ext_clk

Delay_IN

CNT clock

Edge Detector

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