SLG46721 datasheet(30/101 Pages) DIALOG

Part #	SLG46721

Description	Logic & Mixed Signal Circuits

PDF	101 Pages

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Manufacturer	DIALOG [Dialog Semiconductor]

Direct Link	http://www.dialog-semiconductor.com/

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30 / 101 page

000-0046721-114

Page 29 of 100

SLG46721

7.8 Register OE IO Structure with Super Driver

7.8.1 Register OE IO Structure with Super Driver (for Pins 10, 12)

Figure 5. Register OE IO with Super Driver Structure Diagram

PAD

Digital In

pull_up_en

10 k



90 k



900 k



Res_sel[1:0]

00: floating

01: 10 k



10: 100 k



11: 1 M



wosmt_en

smt_en

lv_en

Low Voltage

Input

Schmitt Trigger

Input

Non-Schmitt

Trigger Input

Mode [2:0]

000: Digital In without Schmitt Trigger, wosmt_en=1

001: Digital In with Schmitt Trigger, smt_en=1

010: Low Voltage Digital In mode, lv_en = 1

011: analog IO mode

100: push-pull mode, pp_en=1

101: NMOS open drain mode, odn_en=1

110: PMOS open drain mode, odp_en=1

111: analog IO and NMOS open-drain mode, odn_en=1 and AIO_en=1

Analog IO

Digital Out

odn_en

Digital Out

2x_en

pp_en

2x_en

odp_en

Digital Out

pp_en

odp_en

Digital Out

odn_en

4x_en

SLG46721 Datasheet(PDF) 30 Page - Dialog Semiconductor

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