SLG46721 datasheet(18/101 Pages) DIALOG

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000-0046721-114

Page 17 of 100

SLG46721

7.4 I/O Register Settings

7.4.1 PIN 2 Register Settings

7.4.2 PIN 3 Register Settings

Table 6. PIN 2 Register Settings

Signal Function

Address

PIN 2 Mode Control

<830:829>

00: Digital Input without Schmitt Trigger

01: Digital Input with Schmitt Trigger

10: Low Voltage Digital Input

11: Reserved

PIN 2 Pull Down

Resistor Value

Selection

<832:831>

00: Floating

01: 10 k

 Resistor

10: 100 k

 Resistor

11: 1 M

 Resistor

Table 7. PIN 3 Register Settings

Signal Function

Address

PIN 3 Mode Control

(sig_pin3_oe =0)

<834:833>

00: Digital Input without Schmitt Trigger

01: Digital Input with Schmitt Trigger

10: Low Voltage Digital Input

11: Reserved

PIN 3 Mode Control

(sig_pin3_oe =1)

<836:835>

00: Push Pull 1X

01: Push Pull 2X

10: Open Drain NMOS 1X

11: Open Drain NMOS 2X

PIN 3 Pull Up/Down

Resistor Value

Selection

<838:837>

00: Floating

01: 10 k

 Resistor

10: 100 k

 Resistor

11: 1 M

 Resistor

PIN 3 Pull Up/Down

Resistor Selection

<839>

0: Pull Down Resistor

1: Pull Up Resistor

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