PCI7510 datasheet(150/234 Pages) TI

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7–9

7.12 Subsystem Identification Register

The subsystem identification register is used for system and option card identification purposes. This register can

be initialized from the serial EEPROM or programmed via the subsystem access register at offset F8h in the PCI

configuration space (see Section 7.25). See Table 7–10 for a complete description of the register contents.

Bit

Name

Subsystem identification

Type

Default

Bit

Name

Subsystem identification

Type

Default

Subsystem identification

Offset:

2Ch

Type:

Read/Update

Default:

0000 0000h

Table 7–10. Subsystem Identification Register Description

BIT

FIELD NAME

TYPE

DESCRIPTION

31–16 ‡

OHCI_SSID

Subsystem device ID. This field indicates the subsystem device ID.

15–0 ‡

OHCI_SSVID

Subsystem vendor ID. This field indicates the subsystem vendor ID.

‡ One or more bits in this register are cleared only by the assertion of GRST.

7.13 Power Management Capabilities Pointer Register

The power management capabilities pointer register provides a pointer into the PCI configuration header where the

power-management register block resides. The PCI7510 configuration header doublewords at offsets 44h and 48h

provide the power-management registers. This register is read-only and returns 44h when read.

Bit

Name

Power management capabilities pointer

Type

Default

Power management capabilities pointer

Offset:

34h

Type:

Read-only

Default:

44h

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