PCI4451 datasheet(39/216 Pages) TI

39 / 216 page

2–21

Table 2–17. 16-Bit PC Card Interface Control Terminals (slots A and B)

TERMINAL

GFN NO.

GJG NO.

I/O

FUNCTION

NAME

SLOT

A†

SLOT

B‡

SLOT

A†

SLOT

B‡

I/O

FUNCTION

BVD1

(STSCHG/RI)

A11

A10

Battery voltage detect 1. BVD1 is generated by 16-bit memory PC Cards that

include batteries. BVD1 and BVD2 indicate the condition of the batteries on a

memory PC Card. Both BVD1 and BVD2 are kept high when the battery is good.

When BVD2 is low and BVD1 is high, the battery is weak and should be replaced.

When BVD1 is low, the battery is no longer serviceable and the data in the memory

PC Card is lost. See Section 5.6, ExCA Card Status-Change Interrupt

Configuration Register, for the enable bits. See Section 5.5, ExCA Card

Status-Change Register and Section 5.2, ExCA Interface Status Register, for the

status bits for this signal.

Status change. STSCHG is used to alert the system to a change in the READY,

write protect, or battery voltage dead condition of a 16-bit I/O PC Card.

Ring indicate. RI is used by 16-bit modem cards to indicate a ring detection.

BVD2

(SPKR)

C11

F10

Battery voltage detect 2. BVD2 is generated by 16-bit memory PC Cards that

include batteries. BVD2 and BVD1 indicate the condition of the batteries on a

memory PC Card. Both BVD1 and BVD2 are high when the battery is good. When

BVD2 is low and BVD1 is high, the battery is weak and should be replaced. When

BVD1 is low, the battery is no longer serviceable and the data in the memory PC

Card is lost. See Section 5.6, ExCA Card Status-Change Interrupt Configuration

and Section 5.2, ExCA Interface Status Register, for the status bits for this signal.

Speaker. SPKR is an optional binary audio signal available only when the card and

socket have been configured for the 16-bit I/O interface. The audio signals from

cards A and B are combined by the PCI4451 and are output on SPKROUT.

DMA request. BVD2 can be used as the DMA request signal during DMA

operations to a 16-bit PC Card that supports DMA. The PC Card asserts BVD2 to

indicate a request for a DMA operation.

CD1

CD2

J20

B10

J19

D10

PC Card detect 1 and PC Card detect 2. CD1 and CD2 are internally connected to

ground on the PC Card. When a PC Card is inserted into a socket, CD1 and CD2

are pulled low. For signal status, see Section 5.2, ExCA Interface Status Register.

CE1

CE2

F19

G17

G16

G14

Card enable 1 and card enable 2. CE1 and CE2 enable even- and odd-numbered

address bytes. CE1 enables even-numbered address bytes, and CE2 enables

odd-numbered address bytes.

INPACK

B14

A13

Input acknowledge. INPACK is asserted by the PC Card when it can respond to an

I/O read cycle at the current address.

DMA request. INPACK can be used as the DMA request signal during DMA

operations from a 16-bit PC Card that supports DMA. If used as a strobe, then the

PC Card asserts this signal to indicate a request for a DMA operation.

IORD

D20

F16

I/O read. IORD is asserted by the PCI4451 to enable 16-bit I/O PC Card data output

during host I/O read cycles.

DMA write. IORD is used as the DMA write strobe during DMA operations from a

16-bit PC Card that supports DMA. The PCI4451 asserts IORD during DMA

transfers from the PC Card to host memory.

IOWR

D19

F14

I/O write. IOWR is driven low by the PCI4451 to strobe write data into 16-bit I/O PC

Cards during host I/O write cycles.

DMA read. IOWR is used as the DMA write strobe during DMA operations from a

16-bit PC Card that supports DMA. The PCI4451 asserts IOWR during transfers

from host memory to the PC Card.

† Terminal name for slot A is preceded with A_. For example, the full name for GFN terminal G2 is A_ADDR25.

‡ Terminal name for slot B is preceded with B_. For example, the full name for GFN terminal A16 is B_ADDR25.

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