M3885 datasheet(79/103 Pages) RENESAS

79 / 103 page

3885 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS

Status Register

The status register indicates status such as whether an erase opera-

tion or a program ended successfully or in error. It can be read under

the following conditions.

(1) In the read array mode when the read status register command

(7016) is written and the block address is subsequently read.

(2) In the period from when the program write or auto erase starts to

when the read array command (FF16)

The status register is cleared in the following situations.

(1) By writing the clear status register command (5016)

(2) In the deep power down mode

(3) In the power supply off state

Table 22 gives the definition of each status register bit. When power

is turned on or returning from the deep power down mode, the status

Sequencer status (SR7)

The sequencer status indicates the operating status of the flash

memory. When power is turned on or returning from the deep power

down mode, “1” is set for it. This bit is “0” (busy) during the write or

erase operations and becomes “1” when these operations ends.

Erase Status (SR5)

The erase status reports the operating status of the erase operation.

If an erase error occurs, it is set to “1”. When the erase status is

cleared, it is set to “0”.

Program Status (SR4)

The program status reports the operating status of the write opera-

tion. If a write error occurs, it is set to “1”. When the program status is

cleared, it is set to “0”.

If “1” is written for any of the SR5, SR4 bits, the program erase all

blocks, block erase, commands are not accepted. Before executing

these commands, execute the clear status register command (5016)

and clear the status register.

Also, any commands are not correct, both SR5 and SR4 are set to

“1”.

Full Status Check

Results from executed erase and program operations can be known

by running a full status check. Figure 76 shows a flowchart of the full

status check and explains how to remedy errors which occur.

____

Ready/Busy (RY/BY) pin

____

The RY/BY pin is an output pin (N-chanel open drain output) which,

like the sequencer status (SR7), indicates the operating status of the

flash memory. It is “L” level during auto program or auto erase opera-

tions and becomes to the high impedance state (ready state) when

____

these operations end. The RY/BY pin requires an external pull-up.

Table 22 Status register

Each bit of

SRD0 bits

SR7 (D7)

SR6 (D6)

SR5 (D5)

SR4 (D4)

SR3 (D3)

SR2 (D2)

SR1 (D1)

SR0 (D0)

Definition

“1”

“0”

Sequencer status

Reserved

Erase status

Program status

Reserved

Ready

Ended in error

Status name

Busy

Ended successfully

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