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M3885 Datasheet(PDF) 87 Page - Renesas Technology Corp |
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M3885 Datasheet(HTML) 87 Page - Renesas Technology Corp |
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87 / 103 page ![]() 3885 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS 86 Functions To Inhibit Rewriting Flash Memory To prevent the contents of the flash memory data from being read out or rewritten easily, the device incorporates a ROM code protect function for use in parallel I/O mode. ROM code protect function The ROM code protect function is the function inhibit reading out or modifying the contents of the flash memory version by using the ROM code protect control address (FFDB16) during parallel I/O mode. Figure 82 shows the ROM code protect control address (FFDB16). (This address exists in the user ROM area.) If one of the pair of ROM code protect bits is set to “0”, ROM code protect is turned on, so that the contents of the flash memory data are protected against readout and reprogram. ROM code protect is implemented in two levels. If level 2 is selected, the flash memory is protected even against readout by a manufactures inspection test also. When an attempt is made to select both level 1 and level 2, level 2 is selected by default. If both of the two ROM code protect reset bits are set to “00”, ROM code protect is turned off, so that the contents of the flash memory data can be read out or reprogram. Once ROM code protect is turned on, the contents of the ROM code protect reset bits cannot be modified in parallel I/O mode. Use CPU reprogram mode to re- program the contents of the ROM code protect reset bits. Fig. 82 ROM code protect control address ROM code protect control (address FFDB16) (Note 1) ROMCP Reserved bits (“1” at read/write) ROM code protect level 2 set bits (ROMCP2) (Notes 2, 3) b3b2 0 0: Protect enabled 0 1: Protect enabled 1 0: Protect enabled 1 1: Protect disabled ROM code protect reset bits (ROMCR) (Note 4) b5b4 0 0: Protect removed 0 1: Protect set bits effective 1 0: Protect set bits effective 1 1: Protect set bits effective ROM code protect level 1 set bits (ROMCP1) (Note 2) b7b6 0 0: Protect enabled 0 1: Protect enabled 1 0: Protect enabled 1 1: Protect disabled b0 b7 Notes 1: The contents of ROM code protect control register are “FF16” just after reset release. This area is on the ROM in the mask ROM version. 2: When ROM code protect is turned on, the internal flash memory is protected against readout or modification in parallel I/O mode. 3: When ROM code protect level 2 is turned on, ROM code readout by a shipment inspection LSI tester, etc. also is inhibited. 4: The ROM code protect reset bits can be used to turn off ROM code protect level 1 and ROM code protect level 2. However, since these bits cannot be modified in parallel I/O mode, they need to be rewritten in standard serial I/O mode or CPU rewrite mode. 1 1 |
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