DP83261 datasheet(2/132 Pages) NSC

2 / 132 page

Table of Contents

10 FDDI CHIP SET OVERVIEW

20 ARCHITECTURAL DESCRIPTION

21 Ring Engine

22 Interfaces

30 FEATURE OVERVIEW

40 FDDI MAC FACILITIES

41 Symbol Set

42 Protocol Data Units

43 Frame Counts

44 Timers

45 Ring Scheduling

50 FUNCTIONAL DESCRIPTION

51 Token Handling

52 Servicing Transmission Requests

53 Request Service Parameters

54 Frame Validity Processing

55 Frame Status Processing

56 SMT Frame Processing

57 MAC Frame Processing

58 Receive Batching Support

59 Immediate Frame Transmission

510 Full Duplex Operation

511 Parity Processing

60 CONTROL INFORMATION

61 Conventions

62 Access Rules

63 Operation Registers

64 Event Registers

65 MAC Parameters

66 Timer Thresholds

67 Event Counters

70 SIGNAL DESCRIPTIONS

71 Control Interface

72 PHY Interface

73 MAC Indication Interface

74 MAC Request Interface

75 Electrical Interface

76 Pinout Summary

77 Pinout Diagram

80 ELECTRICAL CHARACTERISTICS

81 Absolute Maximum Ratings

82 Recommended Operating Conditions

83 DC Electrical Characteristics

84 AC Electrical Characteristics

APPENDIX A RING ENGINE STATE MACHINES

A1 Receiver

A2 Transmitter

DP83261 Datasheet(PDF) 2 Page - National Semiconductor (TI)

DP83261 Datasheet(HTML) 2 Page - National Semiconductor (TI)

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