iCE40 LP/HX Family

Data Sheet

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FPGA-DS-02029-3.5

35

4.26. SPI Master or NVCM Configuration Time

Symbol

Parameter

Condition

Typ.

Units

POR/CRESET_B to

Device I/O Active

iCE40LP384 - Low Frequency (Default)

25

ms

iCE40LP384 - Medium Frequency

15

ms

iCE40LP384 - High Frequency

11

ms

iCE40LP640 - Low Frequency (Default)

53

ms

iCE40LP640 - Medium Frequency

25

ms

iCE40LP640 - High Frequency

13

ms

iCE40LP/HX1K - Low Frequency (Default)

53

ms

iCE40LP/HX1K - Medium Frequency

25

ms

iCE40LP/HX1K - High Frequency

13

ms

iCE40LP/HX4K - Low Frequency (Default)

230

ms

iCE40LP/HX4K - Medium Frequency

110

ms

iCE40LP/HX4K - High Frequency

70

ms

iCE40LP/HX8K - Low Frequency (Default)

230

ms

iCE40LP/HX8K - Medium Frequency

110

ms

iCE40LP/HX8K - High Frequency

70

ms

Notes:

1.

Assumes sysMEM Block is initialized to an all zero pattern if they are used.

2.

The NVCM download time is measured with a fast ramp rate starting from the maximum voltage of POR trip point.