iCE40 LP/HX Family

Data Sheet

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FPGA-DS-02029-3.5

39

Signal Name

I/O

Description

VCC_SPI

—

SPI interface voltage supply input. Must have a valid voltage even if

configuring from NVCM.

SPI_SCK

I/O

Input Configuration Clock for configuring an FPGA in Slave SPI mode.

Output Configuration Clock for configuring an FPGA configuration modes.

SPI_SS

I/O

SPI Slave Select. Active Low. Includes an internal weak pull-up resistor to

VCC_SPI during configuration. During configuration, the logic level sampled

on this pin determines the configuration mode used by the iCE40 LP/HX

device. An input when sampled at the start of configuration. An input when

in SPI Peripheral configuration mode (SPI_SS = Low). An output when in

Master SPI Flash configuration mode.

SPI_SI

I/O

Slave SPI serial data input and master SPI serial data output

SPI_SO

I/O

Slave SPI serial data output and master SPI serial data input

VPP_FAST

—

Optional fast NVCM programming supply. VPP_FAST, used only for fast

production programming, must be left floating or unconnected in

applications, except CM36 and CM49 packages MUST have the VPP_FAST

ball connected to VCCIO_0 ball externally.

VPP_2V5

—

VPP_2V5 NVCM programming and operating supply