LTM4677 datasheet(47/110 Pages) AD

47 / 110 page

LTC3888-1

Rev. 0

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If power stage UV detection is enabled, a check of the

MFR_PADS_LTC3888-1 status bits shown in Table 8 is

strongly recommended before turning on a rail. Otherwise,

if the power stage UV is in the process of clearing during

system power-up, the resulting LTC3888-1 fault condition

cannot be distinquished from overvoltage on the output.

USING THE VDR MONITOR

When a shared TEMP/FAULT bus is not provided from the

power stages in an application, or if a necessary UV indica-

tion is not provided by the particular power stage selected,

pin 8 of the LTC3888-1 can be programmed to function

as a VDR_MON input by bit 5 of MFR_CHAN_CONFIG on

Page 0 to observe UV conditions on the power stage gate

drive supply. As shown in Figure 24 this simply requires

sensing the supply to be monitored with a resistor divider

that produces 1.22V at the desired UV threshold.

VUV = 1.22V • (R1+R2)/R2

A single VDR_MON input is provided for both master

channels. The state of bit 0 of MFR_PWM_CONFIG_

LTC3888-1 is ignored and UV detection on TSNS1 fully

disabled when VDR_MON is active.

UNUSED TSNS INPUTS

In cases where a shared TEMP/FAULT bus is not avail-

able or monitoring of external temperature is simply not

required, unused TSNS inputs may be left open or wired

to GND as long as bit 0 of MFR_PWM_MODE_LTC3888-1

(paged) is left clear. The LTC3888-1 will then continue to

respond to READ_TEMPERATURE_1 requests, but the

data returned will be meaningless.

PWM FREQUENCY AND INDUCTOR SELECTION

The selection of the PWM switching frequency is a trade-

off between efficiency, transient response and compo-

nent size. High frequency operation reduces the size of

the inductor and output capacitor as well as increasing

the maximum practical control loop bandwidth. However,

efficiency is generally lower due to increased transition

and switching losses. The inductor value is related to the

switching frequency fPWM and step-down ratio. It should

be selected to meet choke ripple current requirements.

The inductor value can be calculated using the following

equation:

L =

VOUT

f PWM • ΔIL

⎛

⎝

⎜

⎞

⎠

⎟ • 1–

VOUT

VIN

⎛

⎝

⎜

⎞

⎠

⎟

Allowing a larger value of choke ripple current (ΔIL) leads

to smaller L, but results in greater core loss and higher

output voltage ripple for a given output capacitance and/

or ESR. A reasonable starting point for setting the ripple

current is 30% of the maximum output current.

APPLICATIONS INFORMATION

Figure 24. LTC3888-1 Power Stage VDR Monitor

388812 F24

TO FAULT

CONTROL

LOGIC

VDR UV

VDR_MON

LTC3888-1

PWM0

POWER STAGE

VIN

VDRV

GATE

DRIVER

1.22V

5V AUX

TO OTHER

POWER

STAGES

VOUT

COUT

LTM4677 Datasheet(PDF) 47 Page - Analog Devices

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