LTM4677 datasheet(21/110 Pages) AD

21 / 110 page

LTC3888-1

Rev. 0

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OPERATION

• Device responds only at device address 0x7C and

global addresses 0x5A and 0x5B

• A persistent Memory Fault Detected is indicated by

STATUS_CML

• Internal EEPROM is not accessed

• RUN pins and SHARE_CLK are driven low continuously

Normal operation can be restored if the RAM BIST sub-

sequently passes, for instance as the result of another

MFR_RESET issued to address 0x7C.

During initialization all PWM outputs are disabled. The

RUN pins and SHARE_CLK are held low and FAULT pins

are high impedance. External configuration resistors are

identified and the contents of the onboard EEPROM are

read into the controller command RAM. The LTC3888-1

can determine key operating parameters from external

configuration resistors according to application Table 10

through Table 12. See the following Resistor Configuration

Pins section for more detail. The resistor configuration

pins only determine some of the preset values of the

controller. The remaining values, retrieved from internal

EEPROM, are programmed at the factory or with PMBus

commands.

If the configuration resistor pins are all open, the

LTC3888-1 will use only EEPROM contents to determine

all operating parameters. If Ignore Resistor Configuration

Pins is set (bit 6 of MFR_CONFIG_ALL), the LTC3888-1

will use only its EEPROM contents to determine all operat-

ing parameters except device address. Unless both ASEL

pins are completely open, the LTC3888-1 will always

determine some portion of its device address from the

resistors on these pins. See Serial Bus Addressing later

in this section.

Testing Integrity of Output Voltage Sense

During initialization, the LTC3888-1 also runs a connectiv-

ity check on the output voltage sense line (VSENSE+) of any

enabled master channel (see bit 4 of MFR_PWM_MODE_

LTC3888-1). If an open circuit is detected during this test,

the failure is indicated in the PMBus status registers, and

all PWMs on the IC are disabled until the test subsequently

passes after MFR_RESET or device power cycle.

ANALOG OUTPUT VOLTAGE CONTROL

The default factory EEPROM settings allow programming

of output voltage using only the external resistors R1 and

R2 shown in Figure 1. The control loop then produces the

desired output in a classical fashion as VFB is regulated

to 400mV. With other key parameters such as output

current limit programmable using external configuration

resistors, it is possible to create complex PolyPhase rail

solutions without needing to connect the device to any

digital bus. Refer to the Applications Information section

for more details on using analog output voltage control

with default factory EEPROM settings.

PMBUS OUTPUT VOLTAGE CONTROL

Once external programming resistors R1 and R2 (Figure

1) are chosen, it is possible to also use the full range

of digitally programmed output voltage control found

on most ADI PSM controllers. This is accomplished by

specifying the external divider gain with VOUT_SCALE_

LOOP. Again, refer to Applications Information for com-

plete details on controlling output voltage using built-in

LTC3888-1 PMBus commands and features.

SOFT-START

The internal microcontroller typically requires 35ms

to complete initialization once all onboard supplies are

above their UVLO threshold. After MCU initialization, an

internal comparator monitors VIN, which must exceed the

VIN_ON threshold before output power sequencing can

begin. SHARE_CLK is released to run and the RUN pins

are released for external control after the part initializes

and VIN is greater than the VIN_ON threshold. Accurate

readback telemetry can then require an additional 90ms

for initial round-robin A/D conversions.

LTM4677 Datasheet(PDF) 21 Page - Analog Devices

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