LTM4677 datasheet(64/110 Pages) AD

64 / 110 page

LTC3888-1

Rev. 0

For more information www.analog.com

somewhat complex. The part provides three handshaking

status bits which reduce this complexity while enabling

robust system level communication. The three hand

shaking status bits are in the MFR_COMMON register.

When the part is busy executing an internal operation,

it will clear bit 6 of MFR_COMMON (Chip Not BUSY).

When internal calculations are in process, the part will

clear bit 5 of MFR_COMMON (Internal Calculations Not

Pending). When the part is busy specifically because it

is transitioning VOUT (margining or on/off) it will clear bit

4 of MFR_COMMON (Output Not In Transition). These

three status bits can be polled with a PMBus read byte

of the MFR_COMMON register until all three bits are set.

A command immediately following all these status bits

being set will be accepted without a NACK, BUSY fault

or ALERT notification. The part can NACK commands for

other reasons, however, as required by the PMBus speci-

fication (e.g., an invalid command or data).

An example of a robust command write algorithm for the

VOUT_COMMAND register is provided in Figure 44. It is

recommended that all command writes be preceded with

such a polling loop to avoid the extra complexity of deal-

ing with busy behavior or unwanted ALERT notifications.

A simple way to achieve this is to embed the polling in

subroutines to write command bytes and words. This poll-

ing mechanism will allow system software to remain clean

and simple while robustly communicating with the part.

When communicating using bus speeds at or below

100kHz, the polling mechanism previously shown pro-

vides a simple solution that ensures robust communica-

tion without clock stretching. At bus speeds in excess

of 100kHz, it is strongly recommended that the part be

enabled to use clock stretching, requiring a PMBus mas-

ter that supports that function. Clock stretching does not

allow the LTC3888-1 to communicate reliably on busses

operating above 400kHz. Operating the LTC3888-1 with

PMBus SCL rates above 400kHz is not recommended.

System software that detects and properly recovers from

the standard PMBus NACK responses or BUSY faults

described in PMBus Specification V1.2, Part II, Section

10.8.7 is required to communicate above 100kHz without

clock stretching.

Refer to Application Note 135 for techniques that may also

applytoimplementarobustPMBusinterfacetotheLTC3888-1.

STATUS AND FAULT LOG MANAGEMENT

Due to internal operation, very infrequently the LS byte

of STATUS_WORD may be inconsistent with the state

of bits in the MS byte. This condition is quite transient

and can normally be resolved by simply re-reading

STATUS_WORD.

If power is lost during an internal store of a fault log to

EEPROM, a partial write of the log can result. In this situ-

ation, the LTC3888-1 will indicate that a partial fault log is

present the next time adequate supply voltage is applied

by setting bit 3 of STATUS_MFR_SPECIFIC and bit 4 of

STATUS_CML. Additional logging remains disabled. The

only way to then determine how much of the log is actu-

ally valid is by subjective evaluation of the contents of

each log event record. MFR_FAULT_LOG_CLEAR will per-

manently erase a partial fault log, allowing a subsequent

log to be written. It is a good practice to always check for

a partial fault log at power-up if fault logging is enabled

(bit 7 of MFR_CONFIG_ALL).

Refer to Fault Log Details in the Operation section for

more details.

LTPOWERPLAY – AN INTERACTIVE DIGITAL POWER GUI

LTpowerPlay is a powerful Windows-based development

environment that supports Analog Devices Power System

Management ICs, including the LTC3888-1. LTpowerPlay

can be used to evaluate ADI products by connecting to

APPLICATIONS INFORMATION

Figure 43. Write Command Data Processing

DECODER

CMD

INTERNAL

PROCESSOR

WRITE COMMAND

DATA BUFFER

PAGE

CMDS

0x00

0x21

0xFD

388812 F43

•

MFR_RESET

VOUT_COMMAND

CALCULATIONS

PENDING

PMBus

WRITE

FETCH,

CONVERT

DATA

AND

EXECUTE

DATA

MUX

LTM4677 Datasheet(PDF) 64 Page - Analog Devices

LTM4677 Datasheet(HTML) 64 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL