LTM4677 datasheet(76/110 Pages) AD

76 / 110 page

LTC3888-1

Rev. 0

For more information www.analog.com

MFR_CHAN_CONFIG

The MFR_CHAN_CONFIG command provides per-channel configuration common to multiple ADI PMBus products.

Bit Definitions:

BIT

MEANING

7:6

(Reserved, must write as 0).

Pin 8 function control: (Page 0 only)

0: Pin 8 functions as TSNS0.

1: Pin 8 functions as VDR_MON.

RUN pin control:

0: When the channel is commanded off, the associated RUN pin is pulsed low for TOFF_DELAY + VOUT/VOUT_TRANSITION_RATE + 136ms

(or MFR_RESTART_DELAY, if longer) regardless of the state of bit 3.

1: RUN pin is not pulsed low if channel is commanded off.

Short cycle control:

0: No special control. Device attempts to follow on/off commands exactly as issued.

1: Output is immediately disabled if commanded back on while waiting for TOFF_DELAY or VOUT/VOUT_TRANSITION_RATE to expire.

A minimum off time of 120ms is then enforced before the channel is turned back on. Additional delay will apply if bit 4 is clear.

SHARE_CLK output control:

0: No special control.

1: Output disabled if SHARE_CLK is held low.

(Reserved, must write as 0).

MFR_RETRY_DELAY control:

0: No retry allowed after output off for any reason until VOUT ≤ 0.125xVOUT_COMMAND.

1: No special control (TOFF_MAX_WARN_LIMIT also disabled).

This command has one data byte.

MFR_PWM_CONFIG_LTC3888-1

The MFR_PWM_CONFIG_LTC3888-1 command controls primary master/slave configuration and monitor ADC sam-

pling control for the LTC3888-1. Both master channels must be turned off by the RUN pins, OPERATION command,

or their combination to process this command. If this command is sent while either master channel is operating, the

LTC3888-1 will NACK the command byte, ignore the command and its data, and assert a BUSY fault.

PMBus COMMAND DETAILS (PWM Configuration)

LTM4677 Datasheet(PDF) 76 Page - Analog Devices