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LTM4677 Datasheet(PDF) 48 Page - Analog Devices

Part # LTM4677
Description  Dual Loop 8-Phase Step-Down DC/DC Controller with Digital Power System Management
PDF  110 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4677 Datasheet(HTML) 48 Page - Analog Devices

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LTC3888-1
48
Rev. 0
For more information www.analog.com
The inductor saturation current rating needs to be higher
than the peak inductor current during transient condi-
tions. If IOUT is the maximum rated load current, then the
maximum transient current IMAX would normally be cho-
sen to be some factor greater than IOUT (e.g., 1.6 • IOUT).
The minimum saturation current rating should be chosen
to allow margin due to manufacturing and temperature
variation in the power stage output current monitor. A
reasonable ISAT value would be 2.2 • IOUT.
The programmed current limit IOUT_OC_FAULT_LIMIT
must be low enough to ensure that the inductor never
saturates and high enough to allow increased current dur-
ing transient conditions. For example, if:
ISAT = 2.2 • IOUT, and
IMAX = 1.6 • IOUT
a reasonable output current limit would be
IOUT_OC_FAULT_LIMIT = 1.8 • IOUT
Once the value of L is known, the type of inductor must
be selected. High efficiency converters generally can-
not afford the core losses found in low-cost powdered
iron cores, forcing the use of more expensive ferrite
or molypermalloy cores. Also, core losses decrease as
inductance increases. Unfortunately, increased induc-
tance requires more turns of wire, larger inductance and
larger copper losses.
Ferrite designs have very low core loss and are preferred
at high switching frequencies. However, these core mate-
rials exhibit hard saturation, causing an abrupt reduc-
tion in the inductance when the peak current capability is
exceeded. Do not allow the core to saturate.
CIN SELECTION
The input bypass capacitance for an LTC3888-1 power
circuit needs to have ESR low enough to keep the sup-
ply drop low as the top MOSFETs turn on, RMS current
capability adequate to withstand the ripple current at the
input, and a capacitance value large enough to maintain
the input voltage until the input supply can make up the
difference. Generally, a capacitor that meets the first two
requirements (particularly a non-ceramic type) will have
far more capacitance than is required to keep capacitance-
based droop under control.
The input capacitance voltage rating should be at least 1.4
times the maximum input voltage. Power loss due to ESR
occurs as I2R dissipation in the capacitor itself. The input
capacitor RMS current and its impact on any preceding
input network is reduced by PolyPhase architecture. It can
be shown that the worst case RMS current occurs when
only one phase is operating. The phase with the highest
(VOUT)(IOUT) product should be used to determine the
maximum RMS current requirement. Increasing the num-
ber of phases will decrease the input RMS ripple current
from this maximum value. 2-phase operation typically
reduces the input capacitor RMS ripple current by a factor
of 30% to 70%.
In continuous inductor conduction mode, the source cur-
rent of the top power MOSFET is approximately a square
wave of duty cycle VOUT/VIN. The maximum RMS capaci-
tor current in this case is given by:
IRMS � IOUT(MAX)
VOUT VIN – VOUT
(
)
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2
This simple worst-case condition is commonly used for
design because even significant deviations do not offer
much relief.
Note that manufacturer ripple current ratings for capaci-
tors are often based on only 2000 hours of life. This makes
it advisable to further derate the capacitor or to choose
a capacitor rated at a higher temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. Always consult the
manufacturer if there is any question.
Ceramic, tantalum, semiconductor electrolyte (OS-CON),
hybrid conductive polymer (SUNCON) and switcher-rated
electrolytic capacitors can be used as input capacitors, but
each has drawbacks. Ceramics have high voltage coeffi-
cients of capacitance and may have audible piezoelectric
effects; tantalums need to be surge-rated; OS-CONs suf-
fer from higher inductance, larger case size and limited
APPLICATIONS INFORMATION



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