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VR4102 Datasheet(PDF) 511 Page - NEC |
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VR4102 Datasheet(HTML) 511 Page - NEC |
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511 / 701 page ![]() CHAPTER 26 FIR (FAST IrDA INTERFACE UNIT) 511 26.2.11 MIRCR (0x0C00 0060) Bit D15 D14 D13 D12 D11 D10 D9 D8 Name Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved R/W RRR RR RR R RTCRST 000 00 00 0 Other resets 0 0 0 0 0 0 0 0 Bit D7D6D5 D4D3 D2D1 D0 Name STA_LEN2 STA_LEN1 STA_LEN0 M_WIDTH4 M_WIDTH3 M_WIDTH2 M_WIDTH1 M_WIDTH0 R/W R/W R/W R/W R/W R/W R/W R/W R/W RTCRST 010 01 00 1 Other resets 0 1 0 0 1 0 0 1 Bit Name Function D15 to D8 Reserved Write 0 when writing. 0 is returned after a read. D7 to D5 STA_LEN2 to STA_LEN0 These bits are used to specify the number of STA (start flag) added to MIR’s transmit frame. STA_LEN2 to 0 Number of STA 001 010 (default) 011 100 111 1 2 4 16 32 Others 2 (reserved) D4 to D0 M_WIDTH4 to M_WIDTH0 These bits are used to specify the MIR pulse modulation width. The MIR’s output pulse is modulated to a pulse consisting of the number of reference clocks (48 MHz) specified by these bits. F_WIDTH4 to 0 Single pulse 00000 00001 : 01001 (default) : 10100 : 11111 1 clock 2 clocks : 10 clocks : 21 clocks : 32 clocks [Function] Controls the MIR operation. The nominal pulse width of MIR is 1/4. Therefore, be sure to set as follows: MIR full mode (1.152 MHz) = 01001 (rate 10/42) MIR half mode (0.576 MHz) = 10100 (rate 21/83) [Caution] During transmission/reception, the contents of this register must not be changed. |
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