CEC1712 datasheet(2/338 Pages) MICROCHIP

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CEC1712

DS00003416C-page 2

 2020-2021 Microchip Technology Inc.

Peripheral Features

• One Serial Peripheral Interface (SPI) Master Con-

troller

- Dual and Quad I/O Support

- Flexible Clock Rates

- Support for 1.8V and 3.3V slave devices

- SPI Burst Capable

- SPI Controller Operates with Internal DMA

Controller with CRC Generation

- Mappable to 2 ports (only 1 port active at a

time)

- SPI interface can be disabled after loading

code

• Internal DMA Controller

- Hardware or Firmware Flow Control

- Firmware Initiated Memory-to-Memory trans-

fers

- Hardware CRC-32 Generator on Channel 0

- 12-Hardware DMA Channels support five

SMBus Master/Slave Controllers and One

SPI Controller

• I2C/SMBus Controllers

- 5 I2C/SMBus controllers

- 3 I2C only controllers without the Network

layer

- 10 Configurable I2C ports

- Full Crossbar switch allows any port to be

connected to any controller

- Supports Promiscuous mode of operation

- Fully Operational on Standby Power

- Multi-Master Capable

- Supports Clock Stretching

- Programmable Bus Speeds

- 1 MHz Capable

- Supports DMA Network Layer

• General Purpose I/O Pins

- Inputs

- Asynchronous rising and falling edge

wakeup detection Interrupt High or Low

Level

- Outputs:

- Push Pull or Open Drain output

- Programmable power well emulation

- Pull up or pull down resistor control

- Automatically disabling pull-up resistors

when output driven low

- Automatically disabling pull-down resis-

tors when output driven high

- Programmable drive strength

- Two separate1.8V/3.3V configurable IO

regions

- Group or individual control of GPIO data

- 8 - Over voltage tolerant GPIO pins

- Glitch protection and Under-Voltage Protec-

tion on all GPIO pins

• Input Capture and Compare timer

- Six 32-bit Capture Registers

- 11 Input Pins (ICTx)

- Full Crossbar switch allows any port to be

connected to any capture register

- 32-bit Free-running timer

- One 32-bit Compare Register output

- Capture, Compare and Overflow Interrupts

• Universal Asynchronous Receiver Transmitter

(UART)

- Three High Speed NS16C550A Compatible

UARTs with Send/Receive 16-Byte FIFOs

- UART1 - Configurable 2-pin/4-pin

- UART2 - 2-pin

- UART3 - 2-pin

- Programmable Main Power or Standby

Power Functionality

- Standard Baud Rates to 115.2 Kbps, Custom

Baud Rates to 1.5 Mbps

• Programmable Timer Interface

- Two16-bit Auto-reloading Timer Instances

- 16 bit Pre-Scale divider

- Halt and Reload control

- Auto Reload

- Two 32-bit Auto-reloading Timer Instances

- 16 bit Pre-Scale divider

- Halt and Reload control

- Auto Reload

- Three Operating Modes per Instance: Timer

(Reload or Free-Running) or One-shot.

- Event Mode is not supported

• 32-bit RTOS Timer

- Runs Off 32kHz Clock Source

- Continues Counting in all the Chip Sleep

States regardless of Processor Sleep State

- Counter is Halted when Embedded Controller

is Halted (e.g., JTAG debugger active, break

points)

- Generates wake-capable interrupt event

• Watch Dog Timer (WDT)

- Generates an interrupt prior to resetting

• 6 Programmable Pulse Width Modulator (PWM)

outputs

- Multiple Clock Rates

- 16-Bit ON & 16-Bit OFF Counters

• 2 Fan Tachometer Inputs

- 16 Bit Resolution

• Breathing LED Interface

- Two Blinking/Breathing LEDs

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