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CEC1712 Datasheet(PDF) 84 Page - Microchip Technology |
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CEC1712 Datasheet(HTML) 84 Page - Microchip Technology |
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84 / 338 page  CEC1712 DS00003416C-page 84 2020-2021 Microchip Technology Inc. 5.5 Block External Interfaces FIGURE 5-1: ARM M4 BASED EMBEDDED CONTROLLER I/O BLOCK DIAGRAM ICode Interface (AHB-Lite) DCode Interface (AHB-Lite) System Interface (AHB-Lite) NVIC Nested Vectored Interrupt Controller TPIU Trace Port Interface ARM_M4 IP Chip-Level System Bus (AMBA 2 AHB) Processor Core Misc. Sideband DAP Debug Access Port Mux Chip-level JTAG TAP ETM / ITM Trace Outputs Debug Host AMBA 2 AHB Adapt Memory Bus Adapt Memory Bus Adapt PMC Block (RAM / ROM) Data Port Code Port AHB Port ARM_M4 EC Block Interrupt Aggregator Grouped (Summary) Interrupts Directly Vectored Connections Interrupts Optionally Grouped Inputs Unconditionally Grouped Inputs Processor Clock Divider Chip-Level Clock Pulse Sync & Stretch Clock Gate Processor Reset Core Reset (POR) |
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