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CEC1712 Datasheet(PDF) 94 Page - Microchip Technology |
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CEC1712 Datasheet(HTML) 94 Page - Microchip Technology |
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94 / 338 page ![]() CEC1712 DS00003416C-page 94 2020-2021 Microchip Technology Inc. QMSPI Controller 10 Transmit 11 Receive TABLE 7-3: DMA CONTROLLER MASTER DEVICES SIGNAL LIST Device Name Dev Num Device Signal Name Direction Description SMB-I2C 0 Controller 0 SMB-I2C_SD- MA_Req INPUT DMA request control from SMB-I2C Slave channel. SMB-I2C_SD- MA_Term INPUT DMA termination control from SMB-I2C Slave channel. SMB-I2C_SDMA_- Done OUTPUT DMA termination control from DMA Con- troller to Slave channel. 1 SMB-I2C_MD- MA_Req INPUT DMA request control from SMB-I2C Mas- ter channel. SMB-I2C_MD- MA_Term INPUT DMA termination control from SMB-I2C Master channel. SMB-I2C_MDMA_- Done OUTPUT DMA termination control from DMA Con- troller to Master channel. SMB-I2C 1 Controller 2 SMB-I2C_SD- MA_Req INPUT DMA request control from SMB-I2C Slave channel. SMB-I2C_SD- MA_Term INPUT DMA termination control from SMB-I2C Slave channel. SMB-I2C_SDMA_- Done OUTPUT DMA termination control from DMA Con- troller to Slave channel. 3 SMB-I2C_MD- MA_Req INPUT DMA request control from SMB-I2C Mas- ter channel. SMB-I2C_MD- MA_Term INPUT DMA termination control from SMB-I2C Master channel. SMB-I2C_MDMA_- Done OUTPUT DMA termination control from DMA Con- troller to Master channel. SMB-I2C 2 Controller 4 SMB-I2C_SD- MA_Req INPUT DMA request control from SMB-I2C Slave channel. SMB-I2C_SD- MA_Term INPUT DMA termination control from SMB-I2C Slave channel. SMB-I2C_SDMA_- Done OUTPUT DMA termination control from DMA Con- troller to Slave channel. 5 SMB-I2C_MD- MA_Req INPUT DMA request control from SMB-I2C Mas- ter channel. SMB-I2C_MD- MA_Term INPUT DMA termination control from SMB-I2C Master channel. SMB-I2C_MDMA_- Done OUTPUT DMA termination control from DMA Con- troller to Master channel. TABLE 7-2: DMA CONTROLLER DEVICE SELECTION (CONTINUED) Device Name Device Number (Note 1) Controller Source Note 1: The Device Number is programmed into field HARDWARE_FLOW_CONTROL_DEVICE of the DMA Channel N Control Register register. |
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