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CEC1712 Datasheet(PDF) 1 Page - Microchip Technology

Part # CEC1712
Description  Cryptographic Embedded Controller
PDF  338 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

CEC1712 Datasheet(HTML) 1 Page - Microchip Technology

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 2020-2021 Microchip Technology Inc.
DS00003416C-page 1
Operating Conditions
• Operating Voltages: 3.3 V and 1.8 V
• Operating Temperature Range: -40 oC to 85 oC
Low Power Modes
• Chip is designed to always operate in Lowest
Power state during Normal Operation
• Supports all 5 ACPI Power States for PC plat-
forms
• Supports 2 Chip-level Sleep Modes: Light Sleep
and Heavy Sleep
- Low Standby Current in Sleep Modes
ARM® Cortex-M4 Embedded Processor
• Programmable clock frequency up to 48 MHz
• Fixed point processor
• Single 4GByte Addressing Space
• Nested Vectored Interrupt Controller (NVIC)
- Maskable Interrupt Controller
- Maskable hardware wake up events
- 8 Levels of priority, individually assignable by
vector
• EC Interrupt Aggregator expands number of Inter-
rupt sources supported or reduces number of vec-
tors needed
• Complete ARM® Standard debug support
- JTAG-Based DAP port, comprised of SWJ-
DP and AHB-AP debugger access functions
Memory Components
- 256 KB Code/Data SRAM
- 224 KB optimized for code performance
- 32 KB optimized for data performance
- 64 Bytes Battery Powered Storage SRAM
- 288 Bytes OTP
- In circuit programmable
-ROM
- Contains Boot ROM
- Contains Runtime APIs for built-in func-
tions
Clocks
• 48 MHz Internal PLL
• 32 kHz Clock Sources
- Internal 32 kHz silicon oscillator
- External 32 kHz crystal (XTAL) source
- External single-ended 32 kHz clock
source
Package Options
- 84 pin WFBGA
Security Features
• Boot ROM Secure Boot Loader
- Hardware Root of trust using Secure Boot
and Immutable code using ECDSA P-384
and SHA-384
- Supports 2 Code Images in external SPI
Flash (Primary and Fall back image)
- Authenticates SPI Flash image before load-
ing
- Support AES-256 Encrypted SPI Flash
images
- Key Revocation
- Roll back protection
- DICE support
• Hardware Accelerators:
- Multi purpose AES Crypto Engine:
- Support for 128-bit - 256-bit key length
- Supports Battery Authentication applica-
tions
- Digital Signature Algorithm Support
- Support for ECDSA and EC_KCDSA
- Cryptographic Hash Engine
- Support for SHA-1, SHA-256 to SHA-512
- Public Key Crypto Engine
- Hardware support for RSA and Elliptic
Curve asymmetric public key algorithms
- RSA keys length of 1024 to 4096 bits
- ECC Prime Field keys up to 571 bits
- ECC Binary Field keys up to 571 bits
- Microcoded support for standard public
key algorithms
- OTP for storing Keys and IDs
- Lockable on 32 B boundaries to prevent
read access or write access
- True Random Number Generator
- 1 kbit FIFO
- JTAG Disabled by default
CEC1712
Cryptographic Embedded Controller


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