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CEC1712 Datasheet(PDF) 21 Page - Microchip Technology |
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CEC1712 Datasheet(HTML) 21 Page - Microchip Technology |
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21 / 338 page ![]() 2020-2021 Microchip Technology Inc. DS00003416C-page 21 CEC1712 3 Reserved Default: 0 GPIO034 PIO VTR1 All PGS options No Gate Yes 1 Reserved 2 Reserved 3 Reserved Default: 0 GPIO170 PIO PU VTR1 All PGS options No Gate Yes 1 UART1_TX PIO All PGS options NA 2 Reserved 3 Reserved Strap JTAG_STRAP PIO Default: 0 GPIO171 PIO VTR1 All PGS options No Gate Yes 1 UART1_RX PIO All PGS options Low 2 Reserved 3 Reserved Default: 0 JTAG_RST# I VTR1 N/A Yes Note 11,12 1 Reserved 2 Reserved 3 Reserved Default: 0 GPIO104 PIO VTR1 All PGS options No Gate Yes 1 UART0_TX PIO All PGS options NA 2 TFDP_CLK PIO All PGS options NA 3 Reserved Strap VTR2_STRAP PIO Default: 0 GPIO105 PIO VTR1 All PGS options No Gate Yes 1 UART0_RX PIO All PGS options Low 2 TFDP_DATA PIO All PGS options NA 3 Reserved Default: 0 GPIO046 PIO VTR1 All PGS options No Gate Yes TABLE 2-3: CEC1712 PIN MULTIPLEXING Mux Value Signal Name Buffer Type Drive Strength PAD Power Well Emulated Power Well Gated State OverVolt- age Protect Back- drive Protect Notes |
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