M37151 datasheet(12/139 Pages) RENESAS

12 / 139 page

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS

M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP

Rev. 1.0

8. FUNCTIONAL DESCRIPTION

8.1 CENTRAL PROCESSING UNIT (CPU)

This microcomputer uses the standard 740 Family instruction set.

Refer to the table of 740 Family addressing modes and machine

instructions or the SERIES 740 <Software> User’s Manual for de-

tails on the instruction set.

Availability of 740 Family instructions is as follows:

The FST and SLW instructions cannot be used.

The MUL, DIV, WIT and STP instructions can be used.

8.1.1 CPU Mode Register

The CPU mode register includes the stack page selection bit and

internal system clock selection bit. The CPU mode register is allo-

cated at address 00FB16.

Fig. 8.1.1 CPU Mode Register

b7 b6 b5 b4 b3 b2 b1 b0

After reset RW

CPU Mode Register

0, 1

3, 4

Name

Functions

Processor mode bits

(CM0, CM1)

0 0: Single-chip mode

0 1:

1 0:

Not available

1 1:

Fix these bits to “1.”

Stack page selection

bit (CM2) (See note)

b1 b0

0: 0 page

1: 1 page

Main Clock (XIN–XOUT)

stop bit (CM6)

CPU mode register (CM) [Address 00FB16]

R W

XCOUT drivability

selection bit (CM5)

0: LOW drive

1: HIGH drive

0: Oscillating

1: Stopped

Internal system clock

selection bit

(CM7)

0: XIN selected

(high-speed mode)

1: XCIN–XCOUT selected

(low-speed mode)

Note. This bit is set to “1” after the reset release.

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