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M37151 Datasheet(PDF) 32 Page - Renesas Technology Corp |
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M37151 Datasheet(HTML) 32 Page - Renesas Technology Corp |
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32 / 139 page  SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER MITSUBISHI MICROCOMPUTERS M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP 31 Rev. 1.0 8.6.2 I2C Address Register The I2C address register (address 00F716) consists of a 7-bit slave address and a read/write bit. In the addressing mode, the slave ad- dress written in this register is compared with the address data to be received immediately after the START condition is detected. (1) Bit 0: read/write bit (RBW) Not used when comparing addresses in the 7-bit addressing mode. In the 10-bit addressing mode, the first address data to be received is compared with the contents (SAD6 to SAD0 + RBW) of the I2C address register. The RBW bit is cleared to “0” automatically when the stop condition is detected. (2) Bits 1 to 7: slave address (SAD0–SAD6) These bits store slave addresses. Regardless of the 7-bit address- ing mode and the 10-bit addressing mode, the address data trans- mitted from the master is compared with the contents of these bits. Fig. 8.6.3 I2C Address Register b7 b6 b5 b4 b3 b2 b1 b0 0 B Name Functions After reset RW Read/write bit (RBW) 1 to 7 Slave address (SAD0 to SAD6) <Only in 10-bit addressing (in slave) mode> The last significant bit of address data is compared. 0: Wait the first byte of slave address after START condition (read state) 1: Wait the first byte of slave address after RESTART condition (write state) <In both modes> The address data is compared. I2C Address Register I2C address register (S0D) [Address 00F716] 0 0 R — RW |
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