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TPS25751D Datasheet(PDF) 87 Page - Texas Instruments |
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TPS25751D Datasheet(HTML) 87 Page - Texas Instruments |
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87 / 89 page  www.ti.com EXAMPLE BOARD LAYOUT 0.05 MIN ALL AROUND 0.05 MAX ALL AROUND 32X (0.2) 32X (0.55) ( 0.2) TYP VIA 28X (0.4) (3.85) (3.85) ( 2.8) (R0.05) TYP (1.15) (1.15) VQFN - 1 mm max height RSM0032B PLASTIC QUAD FLATPACK - NO LEAD 4219108/B 08/2019 SYMM 1 8 9 16 17 24 25 32 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X 33 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METAL SOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) EXPOSED METAL |
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