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MP8796B Datasheet(PDF) 44 Page - Monolithic Power Systems |
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MP8796B Datasheet(HTML) 44 Page - Monolithic Power Systems |
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44 / 52 page ![]() MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS MP8796B Rev. 1.0 www.MonolithicPower.com 44 1/19/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. MFR_CTRL_COMP (D0h) The MFR_CTRL_COMP command adjusts the loop compensation of the MP8796B. Bits Name Access Behavior Default Description [7:5] RESERVED R/W Live 000 [4] Cff R/W Live 0 Sets the feed-forward capacitance when the internal feedback resistor divider is selected. 0: 20pF 1: 50pF [3:1] RAMP R/W Live 100 Set the internal ramp compensation to stabilize the loop. Note: The actual ramp amplitude is related to EAh[3]. Refer to the register EAh description below for details. EAh[3] = 0 (single- phase) EAh[3] = 1 (multi-phase) 000: 5.6mV ramp 000: 8.6mV ramp 001: 9.8mV ramp 001: 15mV ramp 010: 18mV ramp 010: 27mV ramp 011: 30mV ramp 011: 45mV ramp 100: 8.5mV ramp 100: 13mV ramp 101: 15.1mV ramp 101: 23mV ramp 110: 27mV ramp 110: 41mV ramp 111: 44mV ramp 111: 68mV ramp [0] Slave Fault Detection R/W Live 1 Enables or disables the slave fault detection function through the PG pin. 0: Slave-phase fault detection is enabled 1: Slave-phase fault detection is disabled MFR_CTRL_VOUT (D1h) The MFR_CTRL_VOUT command adjusts the output voltage behaviors of the MP8796B. Bits Name Access Behavior Default Description [7] RESERVED R/W Live 0 [6] Vo discharge R/W Live 1 1: Output voltage discharge at CTRL low 0: No active output voltage discharge [5:2] PG delay R/W Live 0000 0000: 1ms 0001: 2ms … 1110: 15ms 1111: 0ms [1:0] VO_RANGE R/W Live 00 Chooses the internal voltage divider ratio. 00: VREF / VO = 1, VO = 0.4V to 0.672V, LSB = 2mV 01: VREF / VO = 0.5, VO = 0.4V to 1.344V, LSB = 2mV 10: VREF / VO = 0.25, VO = 0.7V to 2.688V, LSB = 2mV 11: VREF / VO = 0.125, VO = 1.3V to 5.376V, LSB = 2mV The default value of D1h is 0x40. |
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