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MP8796B Datasheet(PDF) 9 Page - Monolithic Power Systems |
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MP8796B Datasheet(HTML) 9 Page - Monolithic Power Systems |
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9 / 52 page ![]() MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS MP8796B Rev. 1.0 www.MonolithicPower.com 9 1/19/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS (continued) VIN = 12V, TJ = -40°C to +125°C(7), typical value is tested at TJ = 25°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Soft Start and Turn-On Delay Soft-start time tSS 61h[2:0] = 3b’001 1.7 2.3 3.0 ms Min programmable soft-start time (6) tSS_MIN 61h[2:0] = 3b’000 1 ms Max programmable soft-start time (6) tSS_MAX 16 ms Turn-on delay tON_DELAY 60h = 0x0001 3.9 4.5 5.1 ms Min turn-on delay (6) tON_DELAY_MIN 60h = 0x0000 0 ms Max turn-on delay (6) tON_DELAY_MAX 60h = 0x0100 1024 ms Error Amplifier Feedback current IFB VFB = VREF 50 100 nA Soft Shutdown Soft shutdown discharge MOSFET RON_DISCH TJ = 25°C 60 120 Ω Under-Voltage Lockout (UVLO) VCC under-voltage lockout threshold rising VCCVth_Rise 2.60 2.75 2.9 V VCC under-voltage lockout threshold falling VCCVth_Fall 2.35 2.50 2.65 V VCC output voltage VCC 3.10 3.25 3.40 V Min input programmable turn-on voltage VIN_ON_MIN VCC = 3.3V 2.65 2.90 3.1 V Max input programmable turn-on voltage VIN_ON_MAX 16 16.5 17 V Min input programmable turn-off voltage (6) VIN_OFF_MIN VCC = 3.3V 2.5 2.75 3 V Max input programmable turn-off voltage VIN_OFF_MAX 15.75 V VDRV under-voltage lockout rising threshold VDRVVth_Rise 2.55 2.75 2.95 V VDRV under-voltage lockout falling threshold VDRVVth_Fall 2.15 2.35 2.55 V Power Good (PG) Power good high threshold PGVth_Hi_Rise FB from low to high, default setting (D9h[1:0] = 2b’01) 91% 94% 97% VREF Power good low threshold PGVth_Lo_Rise FB from low to high, default setting (D4h[1:0] = 2b’00) 112% 115% 118% VREF PGVth_Lo_Fall FB from high to low, default setting (D9h[3:2] = 2’b10) 76% 79% 83% VREF Power good low-to-high delay PGTd Default setting (D1h[5:2] = 4b’0000) 1.6 2.0 2.4 ms Power good sink current capability VPG IPG = 10mA 0.3 V |
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