WM8991 datasheet(113/174 Pages) WOLFSON

113 / 174 page

Pre-Production

WM8991

PP, May 2008, Rev 3.1

113

DIGITAL AUDIO INTERFACE CONTROL

The register bits controlling audio data format, word length, left/right channel data source and TDM

are summarised in Table 59.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

AIFADCL_SRC

Left ADC Data Source Select

0 = Left ADC data is output on left channel

1 = Right ADC data is output on left channel

AIFADCR_SRC

Right ADC Data Source Select

0 = Left ADC data is output on right channel

1 = Right ADC data is output on right

channel

AIFADC_TDM

ADC TDM Enable

0 = Normal ADCDAT operation

1 = TDM enabled on ADCDAT

AIFADC_TDM_

CHAN

ADCDAT TDM Channel Select

0 = ADCDAT outputs data on slot 0

1 = ADCDAT output data on slot 1

AIF_BCLK_INV

BCLK Invert

0 = BCLK not inverted

1 = BCLK inverted

Right, left and I2S modes – LRCLK polarity

0 = normal LRCLK polarity

1 = invert LRCLK polarity

AIF_LRCLK_IN

DSP Mode – mode A/B select

0 = MSB is available on 2nd BCLK rising

edge after LRC rising edge (mode A)

1 = MSB is available on 1st BCLK rising

edge after LRC rising edge (mode B)

6:5

AIF_WL

[1:0]

10b

Digital Audio Interface Word Length

00 = 16 bits

01 = 20 bits

10 = 24 bits

11 = 32 bits

Note - see “Companding” for the selection of

8-bit mode

R4 (04h)

4:3

AIF_FMT

[1:0]

10b

Digital Audio Interface Format

00 = Right justified

01 = Left justified

10 = I2S Format

11 = DSP Mode

DACL_SRC

Left DAC Data Source Select

0 = Left DAC outputs left channel data

1 = Left DAC outputs right channel data

DACR_SRC

Right DAC Data Source Select

0 = Right DAC outputs left channel data

1 = Right DAC outputs right channel data

AIFDAC_TDM

DAC TDM Enable

0 = Normal DACDAT operation

1 = TDM enabled on DACDAT

R5 (05h)

AIFDAC_TDM_

CHAN

DACDAT TDM Channel Select

0 = DACDAT data input on slot 0

1 = DACDAT data input on slot 1

Table 59 Audio Data Format Control

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