TAS2020 datasheet(27/79 Pages) TI2

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format and 1 for I2S format. The TDM TX can either transmit logic 0 or Hi-Z depending on the setting of the

TX_FILL register bit. An optional bus keeper can weakly hold the state of SDOUT pin when all devices are

driving Hi-Z. Since only one bus keeper is required on SDOUT, this feature can be disabled via the TX_KEEPEN

TX_KEEPLN register bit. Additionally, the keeper LSB can be driven for a full cycle or half of cycle using

TX_KEEPCY register bit.

The device also support monitoring and TDM transmit of PVDD. For PVDD slot, enable and length settings

PVDD_SLOT[5:0], PVDD_TX and PVDD_SLEN register bits can be use. Die temperature can also be

transmitted from the device in same manner. Enable and slot settings for Die temperature are done using

TEMP_TX and TEMP_SLOT [5:0] register bits.

Information about status of slots can be found in STATUS_SLOT[5:0] register bits. STATUS_TX register bit set

high enables the status transmit. Status slot length is always 8bits and the table below summarizes the status bit

information that is transmitted when status transmit is enabled. If time slot selections place transmission beyond

the frame boundary, the transmitter truncates transmission at the frame boundary.

6.4.3.1 Digital Loopback

The device supports loop back feature to loop SDIN data to SDOUT at two levels. When this feature is enabled

through TDM_LOOPBACK register bit, loop back is done at the IO Pin level without any ASI data decoding

within the device. Other option is to enable the loop back feature through TDM_DESER_LOOPBACK register

bit in which case SDIN data first goes through ASI protocol decoding within the device and then sent back via

SDOUT. These SDIN to SDOUT loop back options can be useful for board level debug of an audio system.

Device can also loop back echo reference digital audio data at the end of the internal signal processing

blocks like Limiter, BOP etc. through SDOUT signal. This allows audio system to perform noise and echo

cancellation algorithms in a host processor that is connected to the device. The echo reference can be enabled

by configuring AUDIO_TX register bit. The slot length and the time slot can be selected using AUDIO_SLEN and

AUDIO_SLOT[5:0] register bits.

6.4.4 Thermal Protection

TAS2020 has internal device junction temperature monitor which protects the device against over temperature.

When the internal temperature rises above the Over temperature threshold, the device automatically shuts down

and sets the Over temperature flag in the corresponding Interrupt registers. The device can automatically retry

to power up if OTE_RETRY bit is set high. When set high, the device attempts to re-power up after every

RETRY_WAIT_TIME setting (default 1.5 seconds of retry)

Along with over temperature protection, the device has thermal warning thresholds to allow for system

to raise interrupts or flags as the junction temperature is approaching the shutdown. There are four

thermal warning flags available at the internal temperature of 105C, 115C, 125C and 135C. Each thermal

warning flag can be independently set to control the Interrupt generation on the IRQZ pad. The minimum

temperature and the step size of the temperature warning flag can be programmed using the registers

THERMAL_WARN_MIN_TEMP[23:0] and THERMAL_WARN_TEMP_STEP[23:0]

The real time internal junction temperature is monitored are stored in the register TMP_CNV and can be read

using i2c commands.

6.4.5 Clocks and PLL

In TDM/I2S Mode, the device operates from SBCLK. Table 6-23 below shows the valid SBCLK frequencies for

each sample rate and SBCLK to FSYNC ratio. For 44.1kHz based clocking, the same table is applicable with the

associated ratio change between 48ksps to 44.1ksps.

While the sampling rate of 192kHz is supported, data is internally down-sampled to 96kHz. Therefore audio

content greater than 40kHz must not be applied to prevent aliasing. This additionally affects all processing

blocks like BOP and limiter which must use 96kHz fs when accepting 192kHz audio.

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TAS2020

SLASFD4A – AUGUST 2024 – REVISED JULY 2026

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