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TAS2020 Datasheet(PDF) 43 Page - Texas Instruments

Part # TAS2020
Description  TAS2020 3.2W Mono Digital Input Class-D Speaker Amp with 5.5V PVDD Support
PDF  79 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS2020 Datasheet(HTML) 43 Page - Texas Instruments

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Table 7-21. IO_CFG_03 Register Field Descriptions (continued)
Bit
Field
Type
Reset
Description
6
SDZ_PD
R/W
1h
Weak pull down for SDZ.
0h = Disabled
1h = Enabled
5
RESERVED
R
0h
Reserved
4
CLH_PD
R/W
1h
Weak pull down for CLH.
0h = Disabled
1h = Enabled
3
SDOUT_PD
R/W
0h
Weak pull down for SDOUT.
0h = Disabled
1h = Enabled
2
SDIN_PD
R/W
0h
Weak pull down for SDIN.
0h = Disabled
1h = Enabled
1
FSYNC_PD
R/W
0h
Weak pull down for FSYNC.
0h = Disabled
1h = Enabled
0
SBCLK_PD
R/W
0h
Weak pull down for SBCLK.
0h = Disabled
1h = Enabled
7.1.21 NG_CFG0 Register (Address = 1Eh) [Reset = 60h]
Return to the Summary Table.
Noise gate hysteresis, threshold level, and enable.
Table 7-22. NG_CFG0 Register Field Descriptions
Bit
Field
Type
Reset
Description
7-6
NG_HYST_TIMER[1:0]
R/W
1h
Noise Gate Entry hysteris timer.
0h = 10ms
1h = 50ms
2h = 100ms
3h = 1000ms
5-3
NG_TH_LVL[2:0]
R/W
4h
Noise-gate audio threshold level.
0h = -85dBFS
1h = -90dBFS
2h = -95dBFS
3h = -100dBFS
4h = -105dBFS
5h = -110dBFS
6h = -115dBFS
7h = -120dBFS
2-0
RESERVED
R
0h
Reserved
7.1.22 INTERRUPT_CFG1 Register (Address = 25h) [Reset = 00h]
Return to the Summary Table.
This register clears all the latched interrupt registers.
Table 7-23. INTERRUPT_CFG1 Register Field Descriptions
Bit
Field
Type
Reset
Description
7
Shared_boost_primary_en R/W
0h
Primary device control in shared boost mode
0h = Disabled
1h = Enabled
www.ti.com
TAS2020
SLASFD4A – AUGUST 2024 – REVISED JULY 2026
Copyright © 2026 Texas Instruments Incorporated
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