Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

TAS2020 Datasheet(PDF) 14 Page - Texas Instruments

Part # TAS2020
Description  TAS2020 3.2W Mono Digital Input Class-D Speaker Amp with 5.5V PVDD Support
PDF  79 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS2020 Datasheet(HTML) 14 Page - Texas Instruments

Back Button TAS2020 Datasheet HTML 10Page - Texas Instruments TAS2020 Datasheet HTML 11Page - Texas Instruments TAS2020 Datasheet HTML 12Page - Texas Instruments TAS2020 Datasheet HTML 13Page - Texas Instruments TAS2020 Datasheet HTML 14Page - Texas Instruments TAS2020 Datasheet HTML 15Page - Texas Instruments TAS2020 Datasheet HTML 16Page - Texas Instruments TAS2020 Datasheet HTML 17Page - Texas Instruments TAS2020 Datasheet HTML 18Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 14 / 79 page
background image
6 Detailed Description
6.1 Overview
The TAS2020 is a mono digital input Class-D amplifier optimized for delivering the highest efficiency across
all powers for longer battery life operation. It comes with a small solution size for board space-constrained
applications. It integrates battery/temperature sensors for system-level protection features.
6.2 Functional Block Diagram
Digital
Audio
Interface
Control
Interface
Clocking
Device
Protections
Power
Management
Digital Core
Monitor
ADC
PVDD and Temp
Monitor
Efficiency
Algos
Filters / Control
PVDD
TEMP
PVDD
OUT_P
OUT_N
DREG
GREG
SBCLK
FSYNC
SDIN
SDOUT
SEL4_ADDR
SEL3_SDA
SEL2_SCL
GND
PGND
SDZ
IRQZ
Class-D
Amp
VDD
IOVDD
SEL1
Figure 6-1. Top Level Functional block diagram
6.3 Device Functional Modes
6.3.1 Operational Modes
6.3.1.1 Hardware Shutdown
The device can be powered down by asserting SDZ pin low. The shutdown behavior of the device when SDZ pin
is pulled low is controlled by SDZ_MODE register settings.
In Hardware Shutdown mode (SDZ_MODE[1:0] = 00 or 01) if the SDZ pin is asserted low, the device consumes
the minimum quiescent current from supplies. All registers lose state in this mode and go back to default
settings, and I2C communication is disabled.
If configured in SDZ_MODE[1:0] = 00, when the SDZ pin is asserted low while audio is playing, the device
follows the normal power down sequencing like volume ramp down on the audio (if enabled), stop the Class-D
TAS2020
SLASFD4A – AUGUST 2024 – REVISED JULY 2026
www.ti.com
14
Submit Document Feedback
Copyright © 2026 Texas Instruments Incorporated
Product Folder Links: TAS2020



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com