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LAN9313 Datasheet(PDF) 153 Page - SMSC Corporation |
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LAN9313 Datasheet(HTML) 153 Page - SMSC Corporation |
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153 / 398 page ![]() Three Port 10/100 Managed Ethernet Switch with MII Datasheet SMSC LAN9313/LAN9313i 153 Revision 1.2 (04-08-08) DATASHEET 13.1.1.2 Interrupt Status Register (INT_STS) This register contains the current status of the generated interrupts. A value of 1 indicates the corresponding interrupt conditions have been met, while a value of 0 indicates the interrupt conditions have not been met. The bits of this register reflect the status of the interrupt source regardless of whether the source has been enabled as an interrupt in the Interrupt Enable Register (INT_EN). Where indicated as R/WC, writing a 1 to the corresponding bits acknowledges and clears the interrupt. Offset: 058h Size: 32 bits BITS DESCRIPTION TYPE DEFAULT 31 Software Interrupt (SW_INT) This interrupt is generated when the SW_INT_EN bit of the Interrupt Enable Register (INT_EN) is set high. Writing a one clears this interrupt. R/WC 0b 30 Device Ready (READY) This interrupt indicates that the LAN9313/LAN9313i is ready to be accessed after a power-up or reset condition. R/WC 0b 29 1588 Interrupt Event (1588_EVNT) This bit indicates an interrupt event from the IEEE 1588 module. This bit should be used in conjunction with the 1588 Interrupt Status and Enable Register (1588_INT_STS_EN) to determine the source of the interrupt event within the 1588 module. RO 0b 28 Switch Fabric Interrupt Event (SWITCH_INT) This bit indicates an interrupt event from the Switch Fabric. This bit should be used in conjunction with the Switch Global Interrupt Pending Register (SW_IPR) to determine the source of the interrupt event within the Switch Fabric. RO 0b 27 Port 2 PHY Interrupt Event (PHY_INT2) This bit indicates an interrupt event from the Port 2 PHY. The source of the interrupt can be determined by polling the Port x PHY Interrupt Source Flags Register (PHY_INTERRUPT_SOURCE_x). RO 0b 26 Port 1 PHY Interrupt Event (PHY_INT1) This bit indicates an interrupt event from the Port 1 PHY. The source of the interrupt can be determined by polling the Port x PHY Interrupt Source Flags Register (PHY_INTERRUPT_SOURCE_x). RO 0b 25:20 RESERVED RO - 19 GP Timer (GPT_INT) This interrupt is issued when the General Purpose Timer Count Register (GPT_CNT) wraps past zero to FFFFh. R/WC 0b 18:13 RESERVED RO - 12 GPIO Interrupt Event (GPIO) This bit indicates an interrupt event from the General Purpose I/O. The source of the interrupt can be determined by polling the General Purpose I/O Interrupt Status and Enable Register (GPIO_INT_STS_EN) RO 0b 11:0 RESERVED RO - |
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