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C167CS Datasheet(PDF) 262 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 262 Page - Infineon Technologies AG |
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262 / 517 page ![]() C167CS Derivatives The General Purpose Timer Units User’s Manual 10-34 V2.0, 2000-07 GPT2 Capture/Reload Register CAPREL in Capture Mode This 16-bit register can be used as a capture register for the auxiliary timer T5. This mode is selected by setting bit T5SC = ‘1’ in control register T5CON. Bit CT3 selects the external input pin CAPIN or the input pins of timer T3 as the source for a capture trigger. Either a positive, a negative, or both a positive and a negative transition at pin CAPIN can be selected to trigger the capture function, or transitions on input T3IN or input T3EUD or both inputs T3IN and T3EUD. The active edge is controlled by bit field CI in register T5CON. The same coding is used as in the two least significant bits of bit field T5I (see Table 10-14). The maximum input frequency for the capture trigger signal at CAPIN is fCPU / 8. To ensure that a transition of the capture trigger signal is correctly recognized, its level should be held for at least 4 fCPU cycles before it changes. Figure 10-22 GPT2 Register CAPREL in Capture Mode When the timer T3 capture trigger is enabled (CT3 = ‘1’) register CAPREL captures the contents of T5 upon transitions of the selected input(s). These values can be used to measure T3’s input signals. This is useful e.g. when T3 operates in incremental interface mode, in order to derive dynamic information (speed acceleration) from the input signals. Auxiliary Timer T5 Edge Select MCB02044B Interrupt Request CAPIN CI T5SC T5CLR Input Clock Up/Down Interrupt Request CAPREL Register |
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