HD6433644R datasheet(140/549 Pages) RENESAS

140 / 549 page

Section 6 ROM

Rev. 6.00 Sep 12, 2006 page 120 of 526

REJ09B0326-0600

6.6

On-Board Programming Modes

When an on-board programming mode is selected, on-chip flash memory programming, erasing,

and verifying can be carried out. There are two on-board programming modes

boot mode and

user program mode

set by the mode pin (TEST) and the FVPP pin. Table 6.9 shows how to select

the on-board programming modes. For information on turning VPP on and off, see note 5 in section

6.9, Flash Memory Programming and Erasing Precautions.

Table 6.9

On-Board Programming Mode Selection

Mode Setting

FVPP

TEST

Notes

Boot mode

12 V*

User program mode

VSS

Note:

* See notes 6 to 8 in section 6.6.1, Notes on Use of Boot Mode, for the timing of 12 V

application.

6.6.1

Boot Mode

When boot mode is used, a user program for flash memory programming and erasing must be

prepared beforehand in the host machine (which may be a personal computer). SCI3 is used in

asynchronous mode (see figure 6.8). When the H8/3644F, H8/3643F, or H8/3642AF is set to boot

mode, after reset release a built-in boot program is activated, the low period of the data sent from

the host is first measured, and the bit rate register (BRR) value determined. The chip’s on-chip

serial communication interface (SCI3) can then be used to download the user program from the

host machine. The downloaded user program is written into RAM.

After the program has been stored, execution branches to the start address (H'FBE0) of the on-chip

RAM, the program stored in RAM is executed, and flash memory programming/erasing can be

carried out. Figure 6.9 shows the boot mode execution procedure.

HOST

Reception of programming data

H8/3644F,

H8/3643F, or

H8/3642AF

RXD

TXD

SCI3

Transmission of verify data

Figure 6.8 Boot Mode System Configuration

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