HD6433644R datasheet(152/549 Pages) RENESAS

152 / 549 page

Section 6 ROM

Rev. 6.00 Sep 12, 2006 page 132 of 526

REJ09B0326-0600

6.7.4

Erase Mode

To erase the flash memory, follow the erasing algorithm shown in figure 6.14. This erasing

algorithm enables data to be erased without subjecting the device to voltage stress or impairing the

reliability of the programmed data.

To erase flash memory, before starting to erase, first place all memory data in all blocks to be

erased in the programmed state (program all memory data to H'00). If all memory data is not in the

programmed state, follow the sequence described later to program the memory data to zero. Select

the flash memory areas to be programmed with erase block registers 1 and 2 (EBR1, EBR2). Next

set the E bit in FLMCR, selecting erase mode. The erase time is the time during which the E bit is

set. To prevent overerasing, use a software timer to divide the time for one erasure, and insure that

the total time does not exceed 30 s. See section 6.7.6, Erase Flowcharts and Sample Programs, for

the time for one erasure. Overerasing, due to program runaway for example, can give memory

cells a negative threshold voltage and cause them to operate incorrectly. Before selecting erase

mode, set up the watchdog timer so as to prevent overerasing.

6.7.5

Erase-Verify Mode

In erase-verify mode, after data has been erased, it is read to check that it has been erased

correctly. After the erase time has elapsed, exit erase mode (clear the E bit to 0), and select erase-

verify mode (set the EV bit to 1). Before reading data in erase-verify mode, write H'FF dummy

data to the address to be read. This dummy write applies an erase-verify voltage to the memory

cells at the latched address. If the flash memory is read in this state, the data at the latched address

will be read. After the dummy write, wait at least 2 µs before reading. Also, wait at least 4 µs

before performing the first dummy write after selecting erase-verify mode. If the read data has

been successfully erased, perform the erase-verify sequence (dummy write, wait of at least 2 µs,

read) on the next address. If the read data has not been erased, select erase mode again and repeat

the same erase and erase-verify sequence through the last address, until all memory data has been

erased to 1. Do not repeat the erase and erase-verify sequence more than 602 times, however.

HD6433644R Datasheet(PDF) 152 Page - Renesas Technology Corp