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HD6433644R Datasheet(PDF) 300 Page - Renesas Technology Corp |
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HD6433644R Datasheet(HTML) 300 Page - Renesas Technology Corp |
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300 / 549 page ![]() Section 10 Serial Communication Interface Rev. 6.00 Sep 12, 2006 page 280 of 526 REJ09B0326-0600 Bits 7 and 6 Operation Mode Select 1, 0 (SNC1, SNC0): Bits 7 and 6 select the operation mode. Bit 7: SNC1 Bit 6: SNC0 Description 0 0 8-bit synchronous transfer mode (initial value) 1 16-bit synchronous transfer mode 1 0 Continuous clock output mode* 1 1 Reserved* 2 Notes: 1. Pins SI1 and SO1 should be used as general input or output ports. 2. Don’t set bits SNC1 and SNC0 to 11. Bits 5 TAIL MARK Control (MRKON): Bit 5 controls TAIL MARK output after an 8- or 16- bit data transfer. Bit 5: MRKON Description 0 TAIL MARK is not output (synchronous mode) (initial value) 1 TAIL MARK is output (SSB mode) Bits 4 LATCH TAIL Select (LTCH): Bit 4 selects whether LATCH TAIL or HOLD TAIL is output as TAIL MARK when bit MRKON is set to 1 (SSB mode). Bit 4: LTCH Description 0 HOLD TAIL is output (initial value) 1 LATCH TAIL is output Bit 3 Clock Source Select (CKS3): Bit 3 selects the clock source and sets pin SCK1 as an input or output pin. Bit 3: CKS3 Description 0 Clock source is prescaler S, and pin SCK1 is output pin (initial value) 1 Clock source is external clock, and pin SCK1 is input pin |
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