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SH7021 Datasheet(PDF) 357 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 357 Page - Renesas Technology Corp |
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357 / 509 page  RENESAS 342 13.1.2 Block Diagram Figure 13.1 shows a block diagram of the SCI. Parity generation Parity check Transmit/ receive control Baud rate generator Clock External clock Internal data bus RXD RDR TDR RSR TSR SSR SCR SMR BRR φ φ/4 φ/16 φ/64 TEI TXI RXI ERI SCK TXD SCI Module data bus RSR: Receive shift register SMR: Serial mode register RDR: Receive data register SCR: Serial control register TSR: Transmit shift register SSR: Serial status register TDR: Transmit data register BRR: Bit rate register Figure 13.1 SCI Block Diagram |
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